Status Language Hardware writes
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Open-source experimental alternative to MSI Center / Mystic Light for low-level LED initialization control on the MSI motherboard family 7A45.
The current codebase is a safety-first research MVP. It models known register-level behavior but does not perform real hardware writes yet.
- Knowledge Map - architecture, hardware paths, register map, and safety model.
- Safety Model - safety rules, preflight gates, and write policy.
- Controlled Write Design - planned gated design for future NCT hardware writes.
- Tested Environments - known safe regression results and target test status.
- MSI 7A45 Read-Only Test Plan - first real-target read-only validation checklist.
- MSI MS-7E75 Research Notes - research-only notes for B850 GAMING PLUS WIFI PZ.
- MSI MS-7E75 Research Plan - staged safety plan before any hardware probing.
- MSI MS-7E75 Current-State Handoff - concise handoff packet covering current status, evidence gaps, and the Phase 4 hold.
- MSI MS-7E75 Static Reverse Engineering Notes - consolidated static MSI Center / Mystic Light module findings and relevance map.
- MSI MS-7E75 Profile Selection Static Notes - static search for MSI Center / Mystic Light board-profile, zone, and route-selection evidence.
- MSI MS-7E75 LEDKeeper2 Static Notes - static LEDKeeper2.exe metadata, string, resource, profile/zone, and dispatch-candidate evidence.
- MSI MS-7E75 Profile Data Static Notes - static decode of Mystic Light online/profile data showing MS-7E75 zone records.
- MSI MS-7E75 Zone Call-Path Static Notes - static MS-7E75 zone-to-
Class_MB_800/MSI_800sLedhelper call-path evidence. - MSI MS-7E75 MB800 HID Static Notes - static HID wrapper, device-open, and Gen1/Gen2 feature-report layout evidence for the MB800 path.
- MSI MS-7E75 MsiHid Native Static Notes - static native
MsiHid.dlldevice-filtering, open, andHidD_SetFeaturewrapper evidence for the MB800 path. - MSI MS-7E75 Linux HID Implementation Plan - documentation-only staged plan for future Linux HID inventory, gating, dry-run report building, and a separate reviewed write path.
- MSI MS-7E75 Linux HID Validation Checklist - read-only real-machine checklist for inventory, gate, and dry-run verification before any future write discussion.
- MSI MS-7E75 Pre-Write Risk Assessment - observation-only risk assessment and external evidence checklist; explicitly defers Phase 4.
- MSI MS-7E75 Phase 4 HID Write Design - documentation-only write design with an explicit Phase 4 hold note; approves no code and no writes.
- MSI MS-7E75 External HID Evidence Notes - external/open-source evidence review for the common Mystic Light HID identity and MB800 report-risk posture.
- MSI MS-7E75 OpenRGB Protocol Comparison - documentation-only comparison between OpenRGB Mystic Light HID packets and the MS-7E75 MB800 report evidence.
- MSI MS-7E75 USBPcap Capture Notes - passive MSI Center capture evidence for
MB -> JARGB_V2_1; observed live traffic is0x50/290, not0x90/302. - MSI MS-7E75 Driver Engine Static Notes - direct static Driver_Engine.dll transport, service, device, and IOCTL evidence.
- MSI MS-7E75 SMBus Engine Static Notes - static SMBus_Engine.dll transaction and controller-selection evidence.
- MSI MS-7E75 RTK Bridge Static Notes - static rtk_bridge.dll Realtek bridge/device-handle evidence and MS-7E75 relevance assessment.
- MSI MS-7E75 CPU Engine Static Notes - static CPU_Engine.dll CPU telemetry/tuning evidence and MS-7E75 relevance assessment.
Status: read-only / dry-run only. Phase 4 is on hold.
Passive MSI Center USBPcap evidence for MB -> JARGB_V2_1 observed HID
Feature SET_REPORT 0x50 with length 290. The only live MSI Center write
path observed so far is 0x50/290. Do not use JARGB_V2_1 -> 0x90 as a
first-write plan; 0x90..0x93 remain static/decompiled evidence only until
live traffic confirms them. This does not approve Linux writes.
Allowed commands:
cargo run -- linux hid inventory cargo run -- linux hid gate cargo run -- linux hid dry-run --zone JRGB1 --color ff0000 cargo run -- linux hid dry-run --zone JARGB_V2_1 --color ff0000
Expected wording:
READ ONLYorDRY RUN ONLYdevices_opened = nowrites_performed = nosupport = unsupported/not enabled
Forbidden here:
write,apply, orsetcommandswrite-once- HID
SetFeature - general Linux lighting support claims
Helpful references:
flowchart LR
App[MSI Center / Mystic Light] --> DLL[MBAPI / Driver Engine]
DLL --> Driver[NTIOLib driver]
Driver --> NCT[Nuvoton NCT6779D]
Driver --> SMBus[Intel SMBus]
NCT --> Init[7A45 LED init/reset]
SMBus --> Renesas[Renesas LED controller 0x52]
Renesas --> RGB[RGB / effects / modes]
boardcontrol[boardcontrol Rust CLI] --> Doctor[doctor preflight]
boardcontrol --> Trace[TraceBackend]
boardcontrol --> ReadOnly[Linux read-only NCT reads]
Doctor --> Safety[DMI + /proc/ioports + /dev/port checks]
ReadOnly --> Allowlist[7A45 allowlist]
boardcontrol currently implements the safe/read-only side of this map: trace simulation, DMI preflight, chip detection, and allowlisted NCT register reads. LED write/apply commands are not implemented yet.
The plan commands calculate RMW reports without writing to hardware or mutating the trace backend.
Current MVP status:
- Rust CLI
- trace backend for safe sequence simulation
- experimental Linux read-only Super I/O chip detection
- no real LED hardware writes yet
- supports only MSI board profile
7A45 - models the Nuvoton NCT6779D LED init/reset sequence
- includes safe RMW allowlist logic
- includes a pure in-memory MS-7E75 MB800 HID Phase 0 report builder
- passes
cargo check,cargo test, andcargo clippy -- -D warnings
| Board | Super I/O | Renesas SMBus | Status |
|---|---|---|---|
7A45 |
Nuvoton NCT6779D |
0x52 |
Trace simulation + experimental Linux read-only chip detection |
MSI 7A45 LED control paths:
- NCT6779D Super I/O through ports
0x4E / 0x4F - Renesas LED controller through Intel SMBus address
0x52
MVP structure:
TraceBackend- board profile
- NCT allowlist
- RMW executor
- CLI commands
- no blind writes
- all NCT writes are modeled as read-modify-write
- every changed bit must be allowed by
(LDN, REG, allowed_change_mask) - unknown boards are unsupported
- real hardware writes are intentionally not implemented yet
new_value = (current & and_mask) | or_mask
changed = current ^ new_value
if changed & !allowed_change_mask != 0:
block
else:
write
cargo run -- detect --board 7A45 cargo run -- nct init-7a45 --dry-run cargo run -- nct reset-led --dry-run cargo run -- nct plan-init-7a45 cargo run -- nct plan-reset-led
--dry-run commands print a planning report first and then execute the same sequence against TraceBackend.
The plan commands only calculate RMW reports and do not mutate even the trace backend.
Safe CI smoke tests cover only trace/planning commands and do not access hardware.
cargo fmt
cargo check
cargo test
cargo clippy -- -D warnings- Trace-only Rust CLI MVP
- 7A45 NCT init/reset sequence model
- Safe RMW allowlist tests
- Linux read-only NCT6779D chip detection
- Linux read-only allowlisted NCT register reads
- Safe doctor/preflight diagnostics
- RMW planning/report layer
- MS-7E75 research-only DMI detection
- MS-7E75 HID Phase 0 in-memory report builder
- Linux
/dev/portbackend for controlled NCT RMW writes -
/proc/ioportsconflict checks - Renesas SMBus raw write backend
- Renesas RGB/mode mapping
- Windows backend
cargo run -- nct detect-chip --backend dev-port --confirm-read
This command only performs Super I/O config-mode register reads for chip identification. It does not execute LED init/reset writes.
Linux only. Requires permission to access /dev/port. The command refuses to run without --confirm-read.
Hardware read commands are gated by Linux DMI checks and are expected to run only on hosts that look like MSI 7A45. Non-target systems, such as Dell OptiPlex machines, are rejected before opening /dev/port.
cargo run -- doctor
doctor performs non-invasive environment checks only. It reads DMI and /proc/ioports, checks whether /dev/port exists, and explains whether hardware-read commands would be blocked. It does not open /dev/port and does not perform Super I/O port I/O.
cargo run -- nct read-reg --board 7A45 --backend dev-port --ldn 0x09 --reg 0xE0 --confirm-read
This command only reads a single allowlisted NCT6779D register for the selected board profile. It refuses unknown boards, unsupported chips, non-allowlisted registers, and runs only after explicit --confirm-read.
This project does not include MSI binaries, MSI drivers, MSI logos, or decompiled MSI source code. It is an independent clean-room implementation based on observed hardware behavior and register-level research.