MESI protocol
<processor >
Modified, Exclusive, Shared, Invalid. A cache coherency protocol where each cache line is marked with one of the four states. The MESI protocol is used by the Pentium processor.
Last updated: 1995年05月05日
Nearby terms:
Mesa ♦ mesh ♦ MESI protocol ♦ message ♦ message board ♦ Message Digest 5
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