Digital Logic and Assertion levels

Question

I'm struggling to get my head around assertion levels and how it relates to logic levels / functions.

For example.

Let's say we have 2 input signals, A and B

So A assertive high and A assertive low. If we had B bar/not , then in this case B assertive high and B assertive low.

The context its being used in is when designing MOSFET logic circuits. But what is even worse is in truth table and the headings are things such as "A assertive low" and "F assertive low" for example.

I know its vague but if I knew more I probably wouldn't be asking this.

Just would like to clear up assertion levels and how it relates to boolean logic if it does at all!

Answer 1

Assertion level is the voltage level in a logic circuit that represents a logical "1". Common level for high = +5v and low = 0v. A logical AND circuit that operates with assertion high (also called positive AND) requires high level on all inputs to yield a high output. If you change your terms of reference to assertion low, then the exact same circuit becomes an OR - any low input yields a low output (also called negative OR).

Positive AND == Negative OR

Answer 2

Assertion in this case simply means in which value is the pin active. For example you might have an IC with an Output Enable input. These are, alongside Chip Selects, usually active low, or in your terms, assertive low. That means: High value means inactivity, Low is active.

It's relation to Boolean logic would be simply a negation (or complement).

In the datasheet, course book, or a tutorial, such I/O pins would be prefixed with an ! / or, as you already said, a horizontal bar.

• binarysmacker: Thanks for the reply Dzarda but I think you may have miss understood, I'll try and rewrite my question to make it a bit clearer if possible

Answer 3

Digital Circuits have 1st High Assertion Logic Level

that is From the View Point of Gates (Circuit) the Digital Signal Pulse Train has a ZERO (0-0.8 V) logic level as a LOW and ONE (approx 2-5 V) Logic level as HIGH

2nd Low Assertion Logic Level

that is From the View Point of Gates (Circuit) the Digital Signal Pulse Train has a ZERO (0-0.8 V) logic level as a HIGH and ONE (approx 2-5 V) Logic level as LOW

Low Assertion Logic level is indicated by a bubble at either input and/or output of a gate