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I am trying to control the slew rate of a reference source for a frequency synthesizer(PLL). The reference source will be the input to the circuit below and the Howland current pump will charge and discharge the capacitor with same time period of the reference source to control the slew rate.

I want to use a Howland current source as a VCCS to charge and discharge a capacitor based on if an input signal rises or falls. I need this circuit working up to (let's say around 500 MHz). I try to simulate this on TINA-TI but I can't seem to get the proper slew rate of output waveform that I want.

Tina TI Circuit Diagram

Output waveform

For source resistance as 50 Ω and Vout = +-5 V, and a capacitance of 1 pF, I expect a slew rate of around 10 V/ns which is not what I am getting.

The first 2 RF amplifiers are TRF37A73 which is then fed into a THS3091 configured as a Howland current pump with a capacitor as a load.

What is the problem in this circuit?

Note: VG2 is the input waveform and VF1 is final output

The input is fed into an RC differentiator to detect rising and falling edges which is then fed into 2 inverting RF amplifiers to amplify the values. Next it is passed into a Howland current source to charge the capacitor when input to the Howland is positive (which happens during rising edges) and vice versa. The rate of charging and discharging of the capacitor can be controlled by tuning the value of the capacitor.

Update: The goal here is to design a slew rate controlled circuit through the charging and discharging of the capacitor in the end. The slew rate can be controlled by tuning the value of the capacitor. Frequency of input waveform is to be maintained. Basically, just recreating a waveform with same frequency and a linear slew rate which can be tuned using the capacitor.

asked Apr 22 at 16:13
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    \$\begingroup\$ Previous questions for reference: electronics.stackexchange.com/questions/744357/… electronics.stackexchange.com/questions/744358/… electronics.stackexchange.com/questions/744435/… I reiterate my comment on the latter -- for what purpose is this? A current source at 500MHz is hopelessly lost in the weeds. What are you actually trying to do? \$\endgroup\$ Commented Apr 22 at 21:07
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    \$\begingroup\$ Tim- I don't think we're going to find out. \$\endgroup\$ Commented Apr 23 at 2:27
  • \$\begingroup\$ @TimWilliams I have mentioned the purpose of the circuit above. Could you clarify on what more details you would like me to add? I don't think I am able to understand the information you are looking for. \$\endgroup\$ Commented Apr 23 at 3:27
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    \$\begingroup\$ @DummyDum as long as you do not make a post per day and edit your previous posts for more details, I think everyone should be happy. \$\endgroup\$ Commented Apr 23 at 3:56
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    \$\begingroup\$ Perhaps I have to give an example. Are you making a radio of some sort or another? Signal processing? Signal generation? Precision timing? You don't have to say it's some product in development (that might be preferred secret), but there are many general applications used in various products. To wit: you say here, you want a waveform, but what are you doing with the waveform? (Because, if it's nothing, I would gladly suggest the trivial solution: none at all. With no application, with no tests to meet, literally any solution, including none at all, will satisfy the requirement!) \$\endgroup\$ Commented Apr 23 at 4:05

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The op-amps you're using are approximately an order of magnitude too slow. And whatever Howland pump you may simulate is unrealizable in practice anyway. To see what you really get, you'll need to add all the parasitics. Yes, every 0.1pF will affect performance, and so will inductance of the traces. Unless you model all those parasitics, what you're simulating is fiction.

I need this circuit working up to (let's say around 500 MHz).

First of all, you can't be using a Howland current source for that. Those sources are basically good at DC and they degrade quickly as you deviate from that.

You could use very fast voltage-feedback op-amps (GBP ≥ 4GHz), but those are not easy to use because parasitic capacitances often swamp any resistances you'd be using. You'd think that the circuit on the left is a voltage follower. Once you use a fast enough op-amp, it's not. It's a transimpedance amplifier, since the parasitic capacitance in parallel with the resistor turns it into an integrator:

schematic

simulate this circuit – Schematic created using CircuitLab

I would not attempt your project with voltage-feedback amplifiers in the ramp generator.

I'd start with an OTA - an operational transconductance amplifier, and with a bandwidth quite a bit higher than 500MHz. 500MHz is just the fundamental if you wanted a sine wave output. But you want to control ramps, and those need at least 8-10 more harmonics to resemble ramps not sine waves.

Typically, such an OTA is fairly easy to make on a CMOS ASIC, and would be integrated with other parts of the system. The integrator capacitor would definitely need to be on the same die.

But you don't have $millions laying around I guess. So you'll need to use either ICs or discrete parts. If you can find a 4Ghz or 5GHz IC OTA, you may be able to get somewhere. I haven't looked, it's likely that someone makes one. Otherwise, you'll have to make one yourself.

But here's a problem: any discrete mosfets you can buy have device (transistor on the die) sizes that are orders of magnitude too large for this application. They also have ESD protection diodes that add intolerable parasitics. So, a discrete mosfet is, at high frequencies, nothing like a mosfet integrated on an IC die.

You may ask: why are the discrete mosfets so "slow"? Mostly because to make use of any faster parts, you need a lab with equipment worth tens of thousands of dollars just to be able to handle them without damaging them, and to assess the performance of any circuits you build out of them. And when you got that sort of money, you'll spend it wisely by designing an ASIC, instead of playing "make a chip" with tiny parts and an expensive assembly process.

So, no CMOS OTAs fast enough can be made from discrete mosfets. Instead, you're looking at assembling a discrete OTA in bipolar technology, using high \$F_T\$ transistors. They go well past 10GHz nowadays. But those transistors can only withstand maybe 1.5-2V between collector and emitter. So any OTA made out of them will likely need several supply and bias voltages (a minor annoyance), a delicate power-up sequence so as not to overstress the parts (a medium annoyance), and will have a limited compliance range (a wee bit of a problem). That is, the output voltage range at which they work as OTAs is small. Outside of that range, they do something else - usually undesirable.

Thus, the waveform you'll get out by having this OTA drive a capacitor will be small too. Think 0.1V in amplitude for low distortion, up to maybe 0.5V if you do a good job with the OTA design.

So you'll need to amplify that small waveform probably. An off-the-shelf wideband RF gain block should do that for you I hope.

You'll also need to rent an equivalent time sampler (stand alone or an oscilloscope) to measure the outputs. There are some open hardware projects, like this one. Note the input voltage range: 2V max. That's quite typical.

If you are serious about your project, that is you have a budget, you should hire a consultant with experience in such high frequency design. Given what it takes to make this stuff work, they will be an excellent value for the money. Someone like Joe Smith would be in the right expertise ballpark I think.

The biggest ROI from a consultant may well be a change in your system architecture, to make it cheaper/easier to accomplish whatever your ultimate goal is.

I know you want to mess about with slew rates of sources that feed a PLL. That's not your end goal. At the moment, there's a fair chance that you're fixated on a little aspect of a solution that not the right solution. This is known as the XY problem.

I still think that probably the most straightforward way to do all this is to have the waveform generation, the PLL, etc., all done in the digital domain on an FPGA. Attach a fast DAC and ADC externally and you got yourself a system. The required components/evaluation boards are only superficially expensive. Given the performance you get out of them, they are a real bargain, and were science fiction just a few decades ago. Things move fast in the DSP world, especially with the mobile communications frenzy.

answered Apr 30 at 8:56
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    \$\begingroup\$ "You may ask: why are the discrete mosfets so "slow"?" Heh, partly it's historic (most of them are old), but partly also for your own success. I did this recently: seventransistorlabs.com/Articles/RFBreakout.html (links to own site) Basically, breadboarding with a 10W rated, "unthrottled" RF version of a 2N7002. The other part is power consumption: to make that thing go that fast (i.e. 100s MHz), you need a source/load impedance of 10s Ω. Which at a few volts signal level, requires a good watt or more of power dissipation. Per device. Miniaturization is king at-frequency! \$\endgroup\$ Commented Apr 30 at 11:25
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    \$\begingroup\$ @TimWilliams I've devoured all of your articles. They are great! \$\endgroup\$ Commented May 1 at 8:16

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