How can I make an 8-Input AND gate?
I'm looking for guidance on how to make an 8-input AND gate. What would be the best approach? Should I use logic gates like ICs or try building it with transistors?
I'm considering two possible methods:
Using ICs: I know that there are logic gates like 4-input AND gates available, so combining two 4-input AND gates could work. Is there a simpler solution, like an 8-input AND gate IC?
Using transistors: Could I build an 8-input AND gate using transistors? If so, what would the transistor configuration look like? Is it practical compared to using ICs?
Edit:
To provide more context:
- Inputs: The inputs are standard logic levels (0V and 5V) coming from other digital circuits.
- Output: The output will drive a TTL logic input, with no need for high current.
- Current requirements: The output doesn’t need to supply large currents, just enough to drive the next stage of the circuit.
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1\$\begingroup\$ The answer depends on what is driving the AND inputs and what the AND output is driving, how much current is required, whether you need the AND output to pull HIGH, LOW or BOTH. Hit the edit button. Welcome to EE.SE. \$\endgroup\$Transistor– Transistor2024年12月28日 21:37:02 +00:00Commented Dec 28, 2024 at 21:37
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\$\begingroup\$ Look 4068 CMOS integrated circuit. \$\endgroup\$Michal Podmanický– Michal Podmanický2024年12月28日 21:42:28 +00:00Commented Dec 28, 2024 at 21:42
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\$\begingroup\$ Is using programmable logic, such as a CPLD or FPGA, possible approach? It's not clear from the question why you need to create an 8-input AND gate and what the constraints on the implementation are. \$\endgroup\$Chester Gillon– Chester Gillon2024年12月28日 21:43:28 +00:00Commented Dec 28, 2024 at 21:43
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\$\begingroup\$ @MichalPodmanický Thanks for the suggestion! I found that the 4068 CMOS IC includes an 8-input AND gate, and it seems like a good option for my needs. I'll go ahead and explore that further. Appreciate the help! \$\endgroup\$philo-nabil– philo-nabil2024年12月28日 21:51:23 +00:00Commented Dec 28, 2024 at 21:51
3 Answers 3
There are CMOS parts such as CD4068 but they cannot literally drive a single (real) TTL input, which requires it to sink 1.6mA or more and drop less than 0.4V for nominal noise immunity. At the high end of the temperature range, it's limited to 360uA with 5V supply and 400mV Vol, less than 25% of the required drive current for a single TTL input.
So you should revisit the "doesn’t need to supply large currents" requirement given what "high current" means to a 4000-series CMOS part operating from a 5V supply. You didn't mention speed- they're also really pokey on 5V- over 600ns propagation delay at 25°C and no doubt worse at high temperature.
I'd probably aim to use a 74HC30 or similar (such as 74HCS30 with ST inputs) 8-input NAND gate, plus an inverter on the output, but I'm sure there are other solutions (for example, two 4-input NAND gates and a NOR gate- eg. 74HC20 + 1/4 74HC02. or 74HCS20 + 74AHC1G02)
8-input AND gate ICs are available, but if you don't want to shop for one, one option is to implement this with diode logic. Diodes can be used to implement a two-input AND gate in the following way:
As you can see, both inputs need to be high in order to block current from being drained through one of the diodes and pulling the output to low.
You can easily extend this idea to an 8-input AND gate using 8 diodes all connected to the pull-up resistor in the same way.
I would then recommend adding two logic inverters (NOT gates) to the output of the diode AND gate one after the other in order to buffer the output and shape it nicely to work well with whatever logic IC family you may be using. One will invert the signal and the other will invert again bringing it back to normal.
One caveat is that the diode AND gate will output around 0.7 V for a logical low due to the diode drop. Using inverters at the output should fix this and bring the low level to 0 V, but the inverters must be able to accept a 0.7 V as low (at your chosen supply voltage rail, if they accept a range of supply voltages).
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1\$\begingroup\$ Thank you so much for the detailed explanation! I really appreciate the diode logic approach you suggested for implementing the AND gate. It’s a clever solution, and I like the idea of using two inverters for signal buffering. I'll definitely consider this method along with the other options. Thanks again for the helpful response! \$\endgroup\$philo-nabil– philo-nabil2024年12月28日 21:53:04 +00:00Commented Dec 28, 2024 at 21:53
ICs that implement 8-input AND and NAND gate already exist. You don't need to create such a thing, but if yoy do, you can combine several smaller gates or build it from discrete transistors depending on what exactly you want to do. They may all be valid options, even if there is usually no point building it with discretes.
If building with discretes, how the circuit will look depends on what kind of transistors they are and what type of logic you want to implement. CMOS, TTL, DTL, RTL, etc.
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\$\begingroup\$ Thanks for the feedback! The inputs will be standard logic levels (0V and 5V) from other digital circuits, and the output will drive a TTL logic input. I don't need to supply much current—just enough to drive the next stage. The output doesn't need to pull HIGH, LOW, or BOTH; standard logic levels will suffice. Does this help clarify the requirements for choosing between ICs or transistors? Also, I found that the 4068 CMOS IC has an 8-input AND gate built-in. Would this be a good option, or should I consider other approaches? \$\endgroup\$philo-nabil– philo-nabil2024年12月28日 21:54:30 +00:00Commented Dec 28, 2024 at 21:54
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\$\begingroup\$ @philo-nabil You already accepted an answer which suggested diodes. I cannot know for what kind of signals you intend to use the chip so I cannot know if the diodes can do it or if the chip is better. Or if some completely other approach for the problem is better. Generally you would assume that you want a chip to do all you need and it could do it, unless there are some details why it can't. \$\endgroup\$Justme– Justme2024年12月28日 21:58:40 +00:00Commented Dec 28, 2024 at 21:58