Using Register IC without a Clock pin

Question

I'm designing a register file and am hung up on using either the 74173 or 74273 IC. The 173 has a clock pin and separate write enable pin but the 273 only has a clock pin where it will latch the data on the rising edge. Can I just connect the clock signal and write enable signal to an AND gate and then connect the output to the clock pin of the 74273?

• jsotola: if it behaves as desired, then you can connect it that way
• Jens: Do you talk about the two clock enable inputs /G1 & /G2 of the '173? They are inverted, so this will not work the same with an AND gate at '273.
• Nijo: I could invert the signal to the inputs G1 and G2 first to get more or less the same effect

Answer 1

Can I just connect the clock signal and write enable signal to an AND gate and then connect the output to the clock pin of the 74273

Hard to tell for sure without seeing the rest of the design, specifically when the enable is activated. If it is enabled when the clock is high, it will generate a clock edge asynchronously. Look at how it is implemented at the TI 74173:

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The clock itself is not gated. The input of the FFs receive the stored bit or the D input.

The 74377 seems to do what is needed, without the problems mentioned above:

enter image description here

• Nijo: Ah, I think I get it now. I'd overlooked that the 173 only latches on the rising edge and will ignore data when clock is high. My setup would've latched anytime the clock and enable is high as you've mentioned. Thanks!
• Nijo: Is there an IC like the 74173 but with 8 bits instead of 4? Similar to the 273 but with a separate enable pin or the 373 but with a clear pin. I can't seem to find one.