Using of physical FPGA for PCB prototyping

Question

Does it make sense use a physical (real, not virtual model) FPGA while in the printed circuit board (PCB) developing cycle?

FPGA and my future PCB will have different element basis (standard cells). FPGA standard cells has logic elements (LE) consisting of LUTs, trigers, etc., but PCB standard cells uses logic gates, registers, sum and compare circuits in DIP chip.

So, success work of my HDL description on physical FPGA not give any guaranties what this HDL description converted in the form of standard cells will work.

In my view physical FPGA it's very interesting chip for final digital circuit product. But, I cannot understand how it can be useful while application-specific integrated circuit or PCB prototyping?

In this case, I find useful, at most, its behavioral simulation before synthesis. But, for this simulation needn't use real FPGA even.

• Hearth: FPGAs are extremely cheap now; I don't see much reason not to keep the FPGA in the final product. There are some small Lattice ones that cost less than 3ドル; if you've gone to the trouble to make the code for one already, it'd probably cost more to buy the logic chips.

Answer 1

Does it make sense use physical (real, not virtual model) FPGA during printed circuit board (PCB) developing cycle?

In my experience, yes. But you need to perform your own cost and schedule analysis. The most difficult part is estimating the probability of success of your ASIC / Standard Cell design. And how much can that probability be increased with an FPGA prototype.

In my line of work, the ASIC cost was extremely high, and the ASIC manufacturing time was very long. The ASICs were extremely complicated and very difficult to fully verify via simulation.

Another advantage to early hardware was to give the software engineers something to work with. Even if you don't have an embedded MCU in your product, you will still often have test software.

• Mark Morgan Lloyd: I believe I've seen a description of a software bundle that allowed Verilog to go all the way to a gate-level netlist... or possibly to discrete transistors.

Answer 2

You are creative in your use of the term "standard cells", and I do appreciate your use. It is technically correct.

Typically, people use it to mean "a library of pre-tested circuit block designs for use in integrated circuit design". So, standard cells are CAD files loaded up when designing an IC.

But you use the term to mean "physical chips from a digital logic family". It’s not a common use and hence it may have misled the other answerers.

You are clear that your target design is a PCB with off-the-shelf fixed function digital chips from one or more logic families.

There may be good reasons for exploring such a design - unalterability of the function of the device, likelihood of failure, or just a hobby of building complex digital logic the way it was done before FPGAs took hold.

So - can you prototype a bunch of discrete gates and LSI functions with an FPGA? Absolutely. But be mindful that the FPGA will be much faster than the discrete chips. The timing constraints you will face for synchronous logic will have the same name in an FPGA and in discrete logic, but vastly different magnitudes of time values.

I’d say - go for it. It can’t hurt. You will still have quite a bit of work to translate the design to discrete logic. But at least you’ll know that the underlying design is sound.