STM32 SVPWM switch timing algorithm

Question

I am designing a 3-phase to 3-phase matrix converter modulated using SVPWM on an STM32F767ZI and I am wondering how you guys would recommend I design the following timing algorithm:

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Figure 12 above shows one period of the switch timing sequence that I want to implement. m_ac, m_ad, m_bd, m_bc, and m_0 are duty cycles that are calculated using values read from multiple ADC channels. T1PR is a constant frequency, but m_ac, m_ad, m_bd, m_bc, and m_0 can vary, but of course always add up to 100%. I am meant to calculate one period's duty cycles m_ac, m_ad, m_bd, m_bc, and m_0 during the previous period's m_0. During a period, I am meant to modulate switches as shown in Figure 11 according to the m_ac, m_ad, m_bd, m_bc, and m_0 duty cycles.

So far from what I have read, I should be using ADC channels with DMA to calculate the duty cycles in the background while using timers with interrupts to modulate the switches for the duty cycle amount of time. I've also read that I'm supposed to use Compare Registers to maybe link different timers as shown in Figure 12's CMPRs, but I am still unsure as to why this needs to be done. I could figure things out through trial and error, but I would appreciate it if I could be pointed towards the right direction.

Answer 1

You have the right general idea. The key steps would be:

Use ADC+DMA to calculate the duty cycles in the background Use a timer with interrupts to keep track of the overall timing Use compare registers/ timers to output the appropriate PWM signals for the calculated duty cycle durations

The reason to use compare registers is so you can precisely control the on/off times of the PWM signals. You set up the compare registers with the duty cycle durations, and the timer will trigger events (like setting output pins high/low) when it matches those compare values. This allows you to very accurately control the PWM duty cycles, and easily change them on the fly by just updating the compare register values. So in summary, I would:

Use DMA+ADC to calculate duties in background Use a high speed timer to keep track of overall timing Load compare registers with duty cycle times Use compare events to control PWM output pins Handle synchronization, dead time insertion, etc in the timer interrupt

This should let you implement the required switching/modulation algorithm accurately.

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