Is it possible to implement one 8-way 1-bit multiplexer?

Question

I'm sorry, but shouldn't 8-way have 3 bits in order to traverse every address? Anyway, I have here a problem, and I am not sure if my solution is correct.

The problem: Given the boolean expression \begin{align*} C'(B+A) + A'B'C \end{align*} Using one 8-way 1-bit multiplexer, implement the boolean expression.

Solution. For our Addresses, we have: \begin{align*} D_7, D_6, D_5, D_4, D_3, D_2, D_1, D_0 \end{align*} For our selectors, \begin{align*} A, B, C \end{align*} Where A is the MSB and C is the LSB. I have 3 1-bit selectors so I can traverse every address. Then, we have our output Y.

Truth Table:

 A B C Y
 0 0 0 0
 0 0 1 1
 0 1 0 1
 0 1 1 0
 1 0 0 1
 1 0 1 0
 1 1 0 1
 1 1 1 0
 

Hence, I have the boolean expression: \begin{align*} D_1A'B'C + D_2A'BC' + D_4AB'C' + D_6ABC' = Y \end{align*} What I did is I only included the rows with 1 in Y, and I negate the switch (A/B/C) if it is 0, and keep it as is otherwise.

• Mitu Raj: You should be able to solve this easy question. Assume (A, B, C) as the select lines (S2, S1, S0). Can you write down the values for D0 to D7 then? Hint: Truth table for the Boolean expression.
• Mitu Raj: For eg: The meaning of D0 in the expression is, what's the value of Y if ABC = 111....
• lambduh: I have the truth table posted. Does that mean my answer (the boolean expression) is correct?
• Mitu Raj: Truth table looks fine. What you have written as answer is generic expression of an 8-bit mux. You have to incorporate (A,B,C) inputs, and values of D0-D7 in it to write the final expression. Then you can draw the block diagram/schematic straight away.
• lambduh: So, for example, since Y is 0 in D_0, that would mean I would negate S2, S1, S0? That would make it D_0S_2'S_1'S_0' for the first term?

Answer 1

An 8-way 1-bit multiplexer refers to 8 input lines and 1 output line; so the 8 way signals get reduced to just 1 bit at the output; So for every clock pulse u can get only 1 bit output for your 8 input bits;

So a 8-way 1-bit MUX just means a 8:1 mux with normal 3 bit select lines.

When you said, "I'm sorry, but shouldn't 8-way have 3 bits in order to traverse every address?" -this statement is absolutely correct in the fact that the 8 input bits also need 3 bit of select line information as input to give me a 1 bit output.

Also note: The solution is absolutely correct in its logic and reasoning.

• Raonoke: The OP was looking for a decoding logic taking in a 3 bit address (A, B, C) and having 8 outputs/selection lines controling 1 of 8 single switches.
• Saranya Mukherjee: The question mentioned,The problem: Using one 8-way 1-bit multiplexer, implement the boolean expression. So the approach for the TT should be the best. While implementing he would put 1 input in all minterms that are 1 in the TT. Here for the boolean expression the TT gives the minterms 1,2,4,6. So for the MUX based implementation he would give 1 input in the D1, D2,D4,D6 and leave others as low. The select lines would be A,B,C in order from msb to lsb. In a decoder based approach he would have to OR the outputs 1,2,4,6. @Raonoke
• Raonoke: Now I got it ;-). The OP was tasked to implement a given boolean expression as homework.

Answer 2

Multiplexer "8 inputs / 1 output" is used as a "fast" lookup table. You choose the addresses with A,B,C then choose the result you want at the selected input (input low or high). The result is then output.

This can be done with higher complexity (more variables). Simple but fine way to replace a PLD or PAL component for simple problems. Next step is EEPROM then FPGA or microcontrollers.