CPU Flash Memory Connection

Question

Im a newbie in designing a CPU external flash memory. I've done the schematics and I want to ask all the expert there if my connection is correct specially the MISO and MOSI which confused me. Flash Memory datsheet is below: http://ww1.microchip.com/downloads/en/DeviceDoc/S71271_04.pdf

Flash Memory Connection CPU (SPI)
Serial Input Data ----> SPI_MISO
Serial Output Data ---> SPI_MOSI
Serial Clock ----> SPI_SCK
Chip Select ----> GPIO
Write ENable -----> Pull High to VDD
Hold -----> Pull High to VDD

Sorry I can't post the an image because this is my first post here.

Hope I explain clearly to you. Thanks

• stevenvh: You can upload the image to a public file server and tell us the URL, we'll include it in your question.
• smashtastic: if you cannot post image try and spilt your connections across multiple lines it will make it easier to read the statement. At the moment it is a bit confusing.

Answer 1

It seems you have the MOSI/MISO lines the wrong way round.

MOSI = Master Out Slave In
MISO = Master In Slave Out

The microcontroller is set as the master, so the MOSI pin is the output (master out) and the MISO pin is the input (master in)

So MOSI must be connected to Flash Data In, and MISO connected to Flash Data Out.

Also , CE (Chip Enable) and HOLD are active low, not high. Write Enable is active high (actually marked as Write Protect in the datasheet so it's active low if you see it this way)

• Joe Hass: The notion of "serial in" depends on your point of view...whether you are the master or slave. A clearer definition for the pins is "Master In Slave Out" and "Master Out Slave In". Therefore you always connect MISO to MISO and connect MOSI to MOSI. This is in contrast to UART serials connections, where you must connect Rx to Tx.
• Oli Glaser: @JoeHass - It's a mistake, I meant Slave In/Out, will change now. Thanks for pointing it out.
• jasp: Hi Thanks for your reply. I got another question for the Flash Data In I connect to the MISO but I need this pin also to be pull down with a 100K resistor, Question will it affect the logic of the MISO bits when reading? For the CE, Hold and Write Protect I understand that this is active low, I dont want to used this feature that's why I pull them high to disable, Is this right thing to do?
• Oli Glaser: @jaydeclaro - No, the 100k resistor won't affect the operation. Yes, you can keep the HOLD and Write protect tied high if you don't plan on using them. CE you need to pull low during communication (which I assume you are aware of due to it being connected to a GPIO)
• supercat: I wonder why many controllers have MISO/MOSI pins whose functions are swapped by the master/slave select control bit, rather than either having dedicated RX/TX pins or else having a bit (besides master/slave select) which would swap the RX/TX functions? In some cases, it may be advantageous to sometimes use a device in master mode and sometimes in slave mode, even while keeping the same connections (e.g. some devices can use a faster clock in slave mode than they can generate in master mode, and when sending lots of data the faster clock may be helpful, but...