STM32F407 - ADC in Scan mode setting overrun bit

Question

I want to read 4 ADC channels in continuous scan mode.

I am using ADC interrupt to read from the ADC data register.

Here is my initialization:

 hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
 hadc3.Init.Resolution = ADC_RESOLUTION_12B;
 hadc3.Init.ScanConvMode = ENABLE;
 hadc3.Init.ContinuousConvMode = ENABLE;
 hadc3.Init.DiscontinuousConvMode = DISABLE;
 hadc3.Init.ExternalTrigConvEdge = 
 ADC_EXTERNALTRIGCONVEDGE_NONE;
 hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 hadc3.Init.NbrOfConversion = 4;
 hadc3.Init.DMAContinuousRequests = DISABLE;
 hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;

I have set a breakpoint in the interrupt handler. As soon as I start debugging, the execution goes into the interrupt handler and the OVR bit is found to be set in the status register.

To proceed with the normal execution I have to re-trigger the ADC via this line of code:

void HAL_ADC_ErrorCallback(ADC_HandleTypeDef* hadc)
{
 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
}

in the ErrorCallback() function.

The readings are coming fine but I cannot understand why the overrun bit is set at every cycle of conversion.

• Arsenal: Do you have that problem if you don't debug? The ADC is continuously sampling and if you halt the core no one will collect the samples and thus the OVR bit is set (I think).

Answer 1

I have same problem with my stm32f405. I find next text in errata :

When a software start of conversion is used as an ADC trigger, and if the ADC_SQRx or ADC_JSQRx registers are modified during the conversion, the current conversion is reset and the ADC does not automatically restart the new conversion sequence. The hardware start of conversion trigger is not impacted and the ADC automatically restarts the new sequence when the next hardware trigger occurs.

I think u solved this problem how ST-designers advised.

Answer 2

Your configuration is somewhat strange to me. You are using continuous scan mode with multiple channels without DMA. This means that you have two options:

1. set conversion rate very slow and set EOCS=1. In this case you'll be getting EOC after each channel and you have to read and process it right away, otherwise OVR will be set.

2. set EOCS=0. In this case you'll only be notified at the end of the sequence, and all channels but last one will be lost. The OVR will be disabled in this case, but it is only useful for things like analog triggers and such.

My advice is to use cyclic DMA to transfer conversion results into buffer automatically, where it can be read from at any time.