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I wonder whats the purpose of the keyword bus in VHDL? It is listed as reserved keyword here but I never encountered it (yet).

asked Mar 22, 2017 at 12:13
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  • \$\begingroup\$ Regarding a company providing a VHDL tool, their database of test cases from customers include only 3 designs which use the keyword bus. It's a keyword from VHDL before the IEEE Std 1164 and type std_logic became popular. \$\endgroup\$ Commented Apr 1, 2017 at 3:01

2 Answers 2

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Let me do what Lincoln already did, but extend it a bit.

It seems that bus is used to represent board-level tristate logic busses, like for instance I2C. I've never seen it used in any VHDL.

In the IEEE Std 1076, 2008 edition it states.

Glossary

bus: One kind of guarded signal. A bus floats to a user-specified value when all of its drivers are turned off. (6.4.2.3, 6.5.2)

guarded signal: A signal declared as a register or a bus. Such signals have special semantics when their drivers are updated from within guarded signal assignment statements. (6.4.2.3)

Let's go to 6.4.2.3:

signal_declaration ::= signal identifier_list : subtype_indication [ signal_kind ] [ := expression ] ;

signal_kind ::= register | bus

explanation:

If a signal kind appears in a signal declaration, then the signals so declared are guarded signals of the kind indicated. [...] A guarded signal may be assigned values under the control of Boolean-valued guard conditions (or guards). When a given guard becomes FALSE, the drivers of the corresponding guarded signals are implicitly assigned a null transaction (see 10.5.2.2) to cause those drivers to turn off. A disconnection specification (see 7.4) is used to specify the time required for those drivers to turn off.

... and all the cross references go on. So I'll so stop there. But some links on the related keywords:

answered Mar 22, 2017 at 19:28
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  • \$\begingroup\$ I remember reading about Guarded Signals in Ashenden years ago, and then seeing that none of the tools I used supported them. \$\endgroup\$ Commented Mar 22, 2017 at 21:24
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From the VHDL spec (IEEE Std 1076, 2000 Edition): "If an interface signal declaration includes the reserved word bus, then the signal declared by that interface is a guarded signal of signal kind bus."

I have no idea what a guarded signal is though.

answered Mar 22, 2017 at 14:24
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