How can I implement this 2-bit adder circuit:
Schematic
(source)
Onto http://www.neuroproductions.be/logic-lab/ or logic.ly? After several attempts (and in spite of the half adder and full adder working) I cannot seem to get this adder working.
Here is the half adder & full adder:
Half Adder & Full Adder
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\$\begingroup\$ We need more information to help. Please show us your half-adder, full-adder, and failed 2-bit adder. \$\endgroup\$gbulmer– gbulmer2014年09月17日 05:04:20 +00:00Commented Sep 17, 2014 at 5:04
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\$\begingroup\$ @gbulmer I have now added the successful half-adder & full adder design. The failed 2-bit adder is trying to recreate the 1st image. \$\endgroup\$Tomas– Tomas2014年09月17日 05:21:31 +00:00Commented Sep 17, 2014 at 5:21
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\$\begingroup\$ I apologise, but I don't understand your problem. I think that logic-lab is a poor piece of software, but I believe I got the two-bit adder of the schematic working okay. I couldn't get the online demo of logic.ly to work, and I'm not going to install it. \$\endgroup\$gbulmer– gbulmer2014年09月17日 12:40:10 +00:00Commented Sep 17, 2014 at 12:40
2 Answers 2
It worked fine in the free online version. The only goofy thing was that I had to use these 3-to-1 outputs to get it to allow the output of one gate to go to multiple inputs of the next stage.
enter image description here
It seems fine to me, most likely it's a incorrect software bug. I looked over the design, and that is my same design for a full adder.
OR:
You may have accidentally put a xor for the or in the 1 output, or a nand , or xnor for a input, and maybe I didn't notice it. Just look it over, and you'll get a result, likely. You have the correct design.