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Classes

struct   cv::gpu::device::reduce_detail::GetType< T >

 

struct   cv::gpu::device::reduce_detail::GetType< T * >

 

struct   cv::gpu::device::reduce_detail::GetType< volatile T * >

 

struct   cv::gpu::device::reduce_detail::GetType< T & >

 

struct   cv::gpu::device::reduce_detail::For< I, N >

 

struct   cv::gpu::device::reduce_detail::For< N, N >

 

struct   cv::gpu::device::reduce_detail::Generic< N >

 

struct   cv::gpu::device::reduce_detail::Unroll< I, Pointer, Reference, Op >

 

struct   cv::gpu::device::reduce_detail::Unroll< 0, Pointer, Reference, Op >

 

struct   cv::gpu::device::reduce_detail::WarpOptimized< N >

 

struct   cv::gpu::device::reduce_detail::GenericOptimized32< N >

 

struct   cv::gpu::device::reduce_detail::StaticIf< val, T1, T2 >

 

struct   cv::gpu::device::reduce_detail::StaticIf< true, T1, T2 >

 

struct   cv::gpu::device::reduce_detail::StaticIf< false, T1, T2 >

 

struct   cv::gpu::device::reduce_detail::IsPowerOf2< N >

 

struct   cv::gpu::device::reduce_detail::Dispatcher< N >

 

Namespaces

  cv

 

  cv::gpu

 

  cv::gpu::device

 

  cv::gpu::device::reduce_detail

 

Functions

template<typename T >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::loadToSmem (volatile T *smem, T &val, unsigned int tid)

 

template<typename T >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::loadFromSmem (volatile T *smem, T &val, unsigned int tid)

 

template<typename P0 , typename P1 , typename P2 , typename P3 , typename P4 , typename P5 , typename P6 , typename P7 , typename P8 , typename P9 , typename R0 , typename R1 , typename R2 , typename R3 , typename R4 , typename R5 , typename R6 , typename R7 , typename R8 , typename R9 >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::loadToSmem (const thrust::tuple< P0, P1, P2, P3, P4, P5, P6, P7, P8, P9 > &smem, const thrust::tuple< R0, R1, R2, R3, R4, R5, R6, R7, R8, R9 > &val, unsigned int tid)

 

template<typename P0 , typename P1 , typename P2 , typename P3 , typename P4 , typename P5 , typename P6 , typename P7 , typename P8 , typename P9 , typename R0 , typename R1 , typename R2 , typename R3 , typename R4 , typename R5 , typename R6 , typename R7 , typename R8 , typename R9 >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::loadFromSmem (const thrust::tuple< P0, P1, P2, P3, P4, P5, P6, P7, P8, P9 > &smem, const thrust::tuple< R0, R1, R2, R3, R4, R5, R6, R7, R8, R9 > &val, unsigned int tid)

 

template<typename T , class Op >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::merge (volatile T *smem, T &val, unsigned int tid, unsigned int delta, const Op &op)

 

template<typename T , class Op >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::mergeShfl (T &val, unsigned int delta, unsigned int width, const Op &op)

 

template<typename P0 , typename P1 , typename P2 , typename P3 , typename P4 , typename P5 , typename P6 , typename P7 , typename P8 , typename P9 , typename R0 , typename R1 , typename R2 , typename R3 , typename R4 , typename R5 , typename R6 , typename R7 , typename R8 , typename R9 , class Op0 , class Op1 , class Op2 , class Op3 , class Op4 , class Op5 , class Op6 , class Op7 , class Op8 , class Op9 >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::merge (const thrust::tuple< P0, P1, P2, P3, P4, P5, P6, P7, P8, P9 > &smem, const thrust::tuple< R0, R1, R2, R3, R4, R5, R6, R7, R8, R9 > &val, unsigned int tid, unsigned int delta, const thrust::tuple< Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9 > &op)

 

template<typename R0 , typename R1 , typename R2 , typename R3 , typename R4 , typename R5 , typename R6 , typename R7 , typename R8 , typename R9 , class Op0 , class Op1 , class Op2 , class Op3 , class Op4 , class Op5 , class Op6 , class Op7 , class Op8 , class Op9 >

__device__ __forceinline__ void  cv::gpu::device::reduce_detail::mergeShfl (const thrust::tuple< R0, R1, R2, R3, R4, R5, R6, R7, R8, R9 > &val, unsigned int delta, unsigned int width, const thrust::tuple< Op0, Op1, Op2, Op3, Op4, Op5, Op6, Op7, Op8, Op9 > &op)