Implementation of an Atari ST in VHDL for Xilinx-based FPGAs
- Tcl 32.9%
- VHDL 31.4%
- C 19.6%
- Assembly 11.9%
- Verilog 2.5%
- Other 1.7%
| docs | Added another key to open the setup menu. | |
| drivers | Bumped copyright years. | |
| hdl | Bumped copyright years. | |
| linux | Added another key to open the setup menu. | |
| setup | Updated Buildroot/Linux/Vivado versions. | |
| vivado | Added the Mega ST Real-Time Clock. | |
| xdc | Added support for the TE0727 ZynqBerryZero board. | |
| .editorconfig | ||
| .gitmodules | ||
| LICENSE | ||
| mkdocs.yml | Updated the documentation. | |
| README.md | ||
zeST - An implementation of an Atari ST in VHDL
Copyright (c) 2019-2025 by François Galea (fgalea à free.fr)
This is a complete implementation of an Atari ST in VHDL, which targets cheap Xilinx Zynq-7000-based prototyping boards.
Its main features are:
- Cycle accuracy, including CPU and display (demos work great!)
- HDMI for video and audio output
- USB for keyboard, mouse input, joysticks, MIDI
- "Accurate enough" floppy drive emulation with support for any format the disk controller can write (not read)
- ACSI hard drive emulation
- Switchable wakestates
- Optional 50 MHz turbo mode
External hardware cores zeST is based on:
- Jorge Cwik's fx68k processor core, a cycle-accurate 68000 processor implementation
- Tsuyoshi Hasegawa's HD63701 compatible processor core, used as the keyboard processor
- John Kent's 6850 compatible ACIA core
All other components have been redesigned from scratch.
zeST is distributed under the GNU General Public License v3 licence. See the LICENSE file or https://www.gnu.org/licenses/gpl-3.0.html for more details.
Contributors
- François Galea
- George Nakos