ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年11月24日 08:00:08 +01:00
e24175b05a
Fix: Increase shared memory size
b69ea230d8
Feature: Moved to cached dbus interface to support dram bursting
334cf10766
Fix: Don't wait for currstate as moving to internal state on memory controller
7f9840b964
Fix: Increase delay count on read cycle
8791526cc7
Fix: Add debug port to build for scala stepping
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年08月18日 03:12:20 +02:00
97459d94b8
UpdateDeps: boost-dev, g++ and iverilog-dev added to dockerfile
50c170ccb4
UpdateDeps: Updated spinal, scala and vexriscv versions
8183e2a6aa
UpdateDeps: Update OSS-CAD-SUITE to 2025年08月14日
4cdd1921d2
Feature: Redesign of bridge, boot rom implemented, test to check firmware WIP
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年08月11日 11:42:16 +02:00
597ee3d36b
UpdateDeps: Included perl for spinal tests, updated curl, git and openjdk packages
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年07月31日 06:56:48 +02:00
23106dd5d6
Fix: Implemented secondary phased clk for sdram clk, fixed driven _q regs in comb logic
bcbf8e0384
Feature: Added phase shift to meet TCMS timings on W0825G6KH-6
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年07月28日 03:39:16 +02:00
bf4070c658
Feature: Implemented suite of simulations, hardware tests and improved controller
fc1cf70f62
Feature: WIP full implementation of ram controller
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月11日 10:09:20 +02:00
3e1f716f8f
Feature: Implement (untested) bridge and axi crossbar, refactored cpu to seperate class
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月08日 08:30:10 +02:00
fa1d01721e
Feature: Prep wires for AXI4 on w9825g6kh_6_controller
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月08日 08:23:52 +02:00
c210ff0912
Feature: Prep wires for AXI4 on w9825g6kh_6_controller
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月08日 08:22:32 +02:00
b7a05112a4
Feature: Prep wires for AXI4 on w9825g6kh_6_controller
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月07日 13:32:15 +02:00
2208913817
Feature: Fix up file naming and allow blackbox interaction with sdram
d8db7969e3
Refactor: Convert to Spinal Project
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月07日 10:31:13 +02:00
abc85cf670
Refactor: Convert to Spinal Project
c42ddb23ac
Feature: S_IDLE functions as auto refresh cycle
abc85cf670
Refactor: Convert to Spinal Project
c42ddb23ac
Feature: S_IDLE functions as auto refresh cycle
d0d865fae3
Fix: Implemented currstate output for testing, fixed various bugs found when running test file
3a8ccebea8
Test: Created physical test for controller with pll for 165mhz clk
e97d6e8c38
Fix: Implement ready and perform many syntax fixes to file
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月04日 05:45:03 +02:00
d0d865fae3
Fix: Implemented currstate output for testing, fixed various bugs found when running test file
3a8ccebea8
Test: Created physical test for controller with pll for 165mhz clk
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年06月03日 08:14:40 +02:00
e97d6e8c38
Fix: Implement ready and perform many syntax fixes to file
6307d98360
Fix: Change sdram_d to an inout port
76c0e62645
Feature: Implement function for handling mode register programming
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年05月30日 07:20:24 +02:00
5fb4cc0986
Feature: Write w9825g6kh-6 controller power on and off features
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年05月29日 09:32:29 +02:00
ea093ce689
Feature: Define CKEn-1 commands and Delays for w9825g6kh-6
ofthemasses
pushed to 5-interface-the-sdram-on-the-ulx3s-with-the-vexriscv-core at ofthemasses/kollectra
2025年05月29日 05:53:47 +02:00
c4e72a5467
Docs: Add Winboard W9825G6KH pin names to constraints file