Default branch
24e36ec574 · stm32mp15: Always use AP1 for conf_swo · Updated
Branches
8dfdd8f3e9 · stlink: document stlink v2-1 bootloader behavior · Updated
d4729b4754 · bmp-v3/platform: Slowed down bus operations to make it easier to view what's going on with a LA · Updated
3bb848da7a · blackpill-f4: split adc conversions · Updated
39b48221d7 · riscv_debug: Report malloc failure in target_description · Updated
e26758d683 · stlink, swlink: Add no-op stubs for spi_xfer_block · Updated
4384dc1c53 · swlink: timing: Update routines for stm32f103 flash · Updated
1f8ff5b8cb · at32f43x: Extend read unprotect to JTAG transport · Updated
afe7de5d45 · platforms/syscalls: Implement Cortex-M exception handlers with morse · Updated
6177c7be03 · target_flash: Implement blank check · Updated
799414aec2 · adi, cortex: Add Cortex-A53 identifiers from BCM2837 · Updated
29590334ce · hosted/remote/protocol_v4: Add JTAG ensure idle command (!JI#) · Updated
984791fc4f · riscv32: Update riscv32_progbuf_mem_read to use both x10 & x11 · Updated
d8e7175df5 · riscv32: Add very basic support for Hazard3 SoC on Icebreaker SPRAM · Updated
7cdc920170 · fixup! bluepillplus: New platform for WeActStudio.BluePill-Plus · Updated
c264478529 · atxmega: Created an initial implementation of breakpoint-based halt_resume · Updated
6805a599eb · hosted/bmp_remote: Corrected the nomenclature around the JTAG add devices functions to match up with the firmware better · Updated
750d91d761 · platforms: Tell locm3 to build the same optimisation level as the firmware · Updated
b39e818aba · am335x: Implemented identification of the Cortex-M3 part of the processor · Updated
148b3b04d9 · Revert "esp32c3: Implemented a custom memory read routine that directly reads the SPI Flash to solve the access problem" · Updated
2bd22b4455 · cortexar: Implemented a routine for dumping the halted core's register state to the console at target debug level · Updated