stlink-ud for unidirectional isolators or level translators. #510

I implemented an stlink variant named stlink-ud, which can be used with unidirectional digital isolators or level translators. This is useful to flash or debug eg. 5 volt targets or targets in a different supply voltage domain. Just compile with make PROBE_HOST=stlink-ud . This pull request only add a directory src/platforms/stlink-ud and doesn't touch anything else.

I will provide a suitable schematics later.

Relevant schematics are here

Adding a new platform needs a good reason. Good reasons are: it is the native platform, there are many boards out there (Stlink, Swlink, PC-Stlink), it shows the handling on another CPU than STM32F103. What applies for stlink-ud?

• are there many boards out there
• doen't native BMP do level translation too>

The schametics also does not show where the signals come from the F103. I guess X1/SV1 are the debuggee connections and SV3 goes to the F103. But where do the SV3 signals come from.

It seems also a variant of the Stlink. Probably you only need SWDIR as additional signal. So why a whole new platform?

In short, a lot is needed to justify inclusion.

Why not keep it as branch on your github?

Adding a new platform needs a good reason. Good reasons are: it is the native platform, there are many boards out there (Stlink, Swlink, PC-Stlink), it shows the handling on another CPU than STM32F103. What applies for stlink-ud?

* are there many boards out there

No.

* doen't native BMP do level translation too>

Latest version (V2.1) seems to have level translation. But it doesn't provide galvanic isolation and that is the thing which is really useful.

The schametics also does not show where the signals come from the F103. I guess X1/SV1 are the debuggee connections and SV3 goes to the F103. But where do the SV3 signals come from.

That is defined in stlink-ud/platform.h and can be easily changed.

It seems also a variant of the Stlink. Probably you only need SWDIR as additional signal. So why a whole new platform?

In short, a lot is needed to justify inclusion.

I understand.

Why not keep it as branch on your github?

That is also OK.

We are going to make a batch of the PCB and add some documentation, too. I think you are right and I will check if the native BMP v2.1 platforms is adaptable for our hardware. When I started this, V2.1 wasn't available at all.

Regarding the Silab isolation parts. Minimum supply voltage is 2.5 V. If you mass erased a NRF52xxx, IO voltage will be 1.8 V. So you setup will not be able to access the NFR in that situation. I have aFTDI adapter mit the Silab parts and hit that problem. A native BMP helped me in that situation.

Regarding the Silab isolation parts. Minimum supply voltage is 2.5 V. If you mass erased a NRF52xxx, IO voltage will be 1.8 V. So you setup will not be able to access the NFR in that situation. I have aFTDI adapter mit the Silab parts and hit that problem. A native BMP helped me in that situation.

You are correct. Thank you for your insight and patience!

The Analog devices digital isolators can work don to 1.62 Volt.