Detailed description
- No new features.
- The existing problem is incorrect memory map introduced by me in #2186.
- This PR solves it by hardcoding fixed sizes of SRAM and Flash for GD32VW553. No flash driver yet.
Tested on "LCSC-boards LCKFB-GD32VW553-HMQ6", now that it arrived, via blackpill-f411ce.
Apparently 0x1ffff7e0 reads as 0xFF, so normal autodetection code gets 65536 KiB for each, this is wrong.
User Manual and Datasheet state that there are either 4 MiB or 2 MiB of SiP flash in these parts, and 320 KiB of SRAM (last 32 KiB are "shared" mysteriously, with Wi-Fi or BLE maybe). Let's just go by that. Flash is readable.
Before:
ID code 0x10307a6d: Nuclei Systems RISC-V DTM.
ID code 0x790007a3: Gigadevice BSD.
RISC-V debug v0.13/v1.0 DMI
RISC-V debug v0.13 DM
Hart has 4 data registers and 2 progbuf registers
...
Attempting 32-bit read on misa
Hart 0: 32-bit RISC-V (arch = 00000307), rv32igcbp ISA (exts = 0010912f), vendor = a36, impl = 30700
Hart has 8 trigger slots available
-> riscv32_probe
Stub for detection of GD32VW553. DBG_ID=0x418, RAM=65535, flash=65535
*** 1 GD32VW5 rv32igcbp
RAM Start: 0x20000000 length = 0x3fffc00
RAM Start: 0x08000000 length = 0x3fffc00
After:
ID code 0x10307a6d: Nuclei Systems RISC-V DTM.
ID code 0x790007a3: Gigadevice BSD.
RISC-V debug v0.13/v1.0 DMI
RISC-V debug v0.13 DM
Hart has 4 data registers and 2 progbuf registers
...
Attempting 32-bit read on misa
Hart 0: 32-bit RISC-V (arch = 00000307), rv32igcbp ISA (exts = 0010912f), vendor = a36, impl = 30700
Hart has 8 trigger slots available
-> riscv32_probe
Stub for detection of GD32VW553. DBG_ID=0x418, RAM=320, flash=4096
*** 1 GD32VW5 rv32igcbp
RAM Start: 0x20000000 length = 0x50000
RAM Start: 0x08000000 length = 0x400000
Your checklist for this pull request
- I've read the Code of Conduct
- I've read the guidelines for contributing to this repository
- It builds for hardware native (see Building the firmware)
- It builds as BMDA (see Building the BMDA)
- I've tested it to the best of my ability
- My commit messages provide a useful short description of what the commits do
Closing issues
## Detailed description
* No new features.
* The existing problem is incorrect memory map introduced by me in #2186.
* This PR solves it by hardcoding fixed sizes of SRAM and Flash for GD32VW553. No flash driver yet.
Tested on "LCSC-boards LCKFB-GD32VW553-HMQ6", now that it arrived, via `blackpill-f411ce`.
Apparently 0x1ffff7e0 reads as 0xFF, so normal autodetection code gets 65536 KiB for each, this is wrong.
User Manual and Datasheet state that there are either 4 MiB or 2 MiB of SiP flash in these parts, and 320 KiB of SRAM (last 32 KiB are "shared" mysteriously, with Wi-Fi or BLE maybe). Let's just go by that. Flash is readable.
Before:
```c
ID code 0x10307a6d: Nuclei Systems RISC-V DTM.
ID code 0x790007a3: Gigadevice BSD.
RISC-V debug v0.13/v1.0 DMI
RISC-V debug v0.13 DM
Hart has 4 data registers and 2 progbuf registers
...
Attempting 32-bit read on misa
Hart 0: 32-bit RISC-V (arch = 00000307), rv32igcbp ISA (exts = 0010912f), vendor = a36, impl = 30700
Hart has 8 trigger slots available
-> riscv32_probe
Stub for detection of GD32VW553. DBG_ID=0x418, RAM=65535, flash=65535
*** 1 GD32VW5 rv32igcbp
RAM Start: 0x20000000 length = 0x3fffc00
RAM Start: 0x08000000 length = 0x3fffc00
```
After:
```c
ID code 0x10307a6d: Nuclei Systems RISC-V DTM.
ID code 0x790007a3: Gigadevice BSD.
RISC-V debug v0.13/v1.0 DMI
RISC-V debug v0.13 DM
Hart has 4 data registers and 2 progbuf registers
...
Attempting 32-bit read on misa
Hart 0: 32-bit RISC-V (arch = 00000307), rv32igcbp ISA (exts = 0010912f), vendor = a36, impl = 30700
Hart has 8 trigger slots available
-> riscv32_probe
Stub for detection of GD32VW553. DBG_ID=0x418, RAM=320, flash=4096
*** 1 GD32VW5 rv32igcbp
RAM Start: 0x20000000 length = 0x50000
RAM Start: 0x08000000 length = 0x400000
```
## Your checklist for this pull request
* [x] I've read the [Code of Conduct](https://github.com/blackmagic-debug/blackmagic/blob/main/CODE_OF_CONDUCT.md)
* [x] I've read the [guidelines for contributing](https://github.com/blackmagic-debug/blackmagic/blob/main/CONTRIBUTING.md) to this repository
* [x] It builds for hardware native (see [Building the firmware](https://github.com/blackmagic-debug/blackmagic?tab=readme-ov-file#building-black-magic-debug-firmware))
* [x] It builds as BMDA (see [Building the BMDA](https://github.com/blackmagic-debug/blackmagic?tab=readme-ov-file#building-black-magic-debug-app))
* [x] I've tested it to the best of my ability
* [x] My commit messages provide a useful short description of what the commits do
## Closing issues