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puya: add support for PY32F002B, PY32F003, PY32F030, PY32x07x #2000

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silbe wants to merge 1 commit from silbe/puya-add-py32f002b-support into main
pull from: silbe/puya-add-py32f002b-support
merge into: blackmagic-debug:main
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silbe commented 2024年11月12日 09:11:28 +01:00 (Migrated from github.com)
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Detailed description

The PY32F002B series uses different DBGMCU IDCODE values and there does not seem to be a register containing RAM and flash size.

While the procedure for preparing flash access (copying parameters from factory-programmed EPPARAx registers to flash peripheral registers) is the same, the bit allocation inside the registers is slightly different.

The structure and values of the DBGMCU IDCODE register are undocumented but the vendor SDK splits it into DEV_ID and REV_ID fields. We use the DEV_ID fields of the IDCODE values observed on PY32F002AW15U and PY32F002BF15P6 to distinguish between the two families. An internet search shows that at least the PY32F002BW15 uses the same value as the PY32F002BF15P6. The full IDCODE values are retained as comments to make it easier to fix the code later if it turns out the DEV_ID/REV_ID split is incorrect.

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## Detailed description The PY32F002B series uses different DBGMCU IDCODE values and there does not seem to be a register containing RAM and flash size. While the procedure for preparing flash access (copying parameters from factory-programmed EPPARAx registers to flash peripheral registers) is the same, the bit allocation inside the registers is slightly different. The structure and values of the DBGMCU IDCODE register are undocumented but the vendor SDK splits it into DEV_ID and REV_ID fields. We use the DEV_ID fields of the IDCODE values observed on PY32F002AW15U and PY32F002BF15P6 to distinguish between the two families. An internet search shows that at least the PY32F002BW15 uses the same value as the PY32F002BF15P6. The full IDCODE values are retained as comments to make it easier to fix the code later if it turns out the DEV_ID/REV_ID split is incorrect. ## Your checklist for this pull request * [X] I've read the [Code of Conduct](https://github.com/blackmagic-debug/blackmagic/blob/main/CODE_OF_CONDUCT.md) * [X] I've read the [guidelines for contributing](https://github.com/blackmagic-debug/blackmagic/blob/main/CONTRIBUTING.md) to this repository * [X] It builds for hardware native (see [Building the firmware](https://github.com/blackmagic-debug/blackmagic?tab=readme-ov-file#building-black-magic-debug-firmware)) * [X] It builds as BMDA (see [Building the BMDA](https://github.com/blackmagic-debug/blackmagic?tab=readme-ov-file#building-black-magic-debug-app)) * [X] I've tested it to the best of my ability * [X] My commit messages provide a useful short description of what the commits do ## Closing issues <!-- put "fixes #XXXX" here to auto-close the issue(s) that your PR fixes (if any). -->
silbe commented 2024年11月12日 09:20:18 +01:00 (Migrated from github.com)
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Rebased on main, fixed style issue shown by clang-format. No functional code changes; test still successful.

Rebased on `main`, fixed style issue shown by clang-format. No functional code changes; test still successful.
dragonmux left a comment
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We love the reduction in unnamed magic numbers! Very curious that they chose to rework several registers' layouts like that too.. seems very odd. Our main review notes are on some signed-but-should-be-unsigned constants and the other is on a further reduction of magic numbers. With those taken care of we're happy to merge this.

We love the reduction in unnamed magic numbers! Very curious that they chose to rework several registers' layouts like that too.. seems very odd. Our main review notes are on some signed-but-should-be-unsigned constants and the other is on a further reduction of magic numbers. With those taken care of we're happy to merge this.
@ -49,0 +97,4 @@
#define PY32F002B_EPPARA1_TS2P_MASK 0x1ffU
#define PY32F002B_EPPARA1_TPS3_SHIFT 16U
#define PY32F002B_EPPARA1_TPS3_MASK 0xfffU
#define PY32F002B_EPPARA2_PERTPE_SHIFT 0U

Please suffix these with U so they are defined unsigned.

Please suffix these with `U` so they are defined unsigned.

Please suffix all these constants with U so they are defined unsigned and don't do a signed-unsigned conversion on assignment.

Please suffix all these constants with `U` so they are defined unsigned and don't do a signed-unsigned conversion on assignment.
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |

With the number of magic numbers involved, it might make sense to name them via #defines's.

With the number of magic numbers involved, it might make sense to name them via `#defines`'s.
silbe (Migrated from github.com) reviewed 2024年11月12日 11:05:25 +01:00
silbe (Migrated from github.com) commented 2024年11月12日 11:05:25 +01:00
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Fixed locally; will push together with the other changes once they are done.

Fixed locally; will push together with the other changes once they are done.
silbe (Migrated from github.com) reviewed 2024年11月12日 11:05:29 +01:00
@ -49,0 +97,4 @@
#define PY32F002B_EPPARA1_TS2P_MASK 0x1ffU
#define PY32F002B_EPPARA1_TPS3_SHIFT 16U
#define PY32F002B_EPPARA1_TPS3_MASK 0xfffU
#define PY32F002B_EPPARA2_PERTPE_SHIFT 0U
silbe (Migrated from github.com) commented 2024年11月12日 11:05:29 +01:00
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Fixed locally; will push together with the other changes once they are done.

Fixed locally; will push together with the other changes once they are done.
silbe (Migrated from github.com) reviewed 2024年11月12日 11:05:34 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月12日 11:05:34 +01:00
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In progress. While doing so I noticed that the existing code uses additional bits from EPPARA4 for PRETPE (datasheet says 26:16 are PRETPE so the mask should be 0x7ff but the code uses 0x3fff). @ArcaneNibble was this on purpose? If not, would you be willing to test my changes if I fix this to match the datasheet values? I don't have a PY32F002A myself.

In progress. While doing so I noticed that the existing code uses additional bits from EPPARA4 for PRETPE (datasheet says 26:16 are PRETPE so the mask should be 0x7ff but the code uses 0x3fff). @ArcaneNibble was this on purpose? If not, would you be willing to test my changes if I fix this to match the datasheet values? I don't have a PY32F002A myself.
silbe (Migrated from github.com) reviewed 2024年11月12日 11:34:10 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月12日 11:34:10 +01:00
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Changed locally to use defines named like PY32F002A_EPPARA0_TS0_SHIFT / ..._MASK and tested successfully on PY32F002B. Waiting for reply from @ArcaneNibble before pushing.

Changed locally to use defines named like `PY32F002A_EPPARA0_TS0_SHIFT` / `..._MASK` and tested successfully on PY32F002B. Waiting for reply from @ArcaneNibble before pushing.
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |

Excellent, let's hope that they get back to you on this query fairly soon then 🙂

Excellent, let's hope that they get back to you on this query fairly soon then 🙂
silbe (Migrated from github.com) reviewed 2024年11月19日 15:33:07 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月19日 15:33:06 +01:00
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It's been a week without feedback from @ArcaneNibble so we'll probably need to continue without their assistance.

I've had a closer look at this and it's quite a mess. The PY32F002A Reference Manual says EPPARA4 26:16 (11 bit) contain the PRETPE value but that it's 12 bit wide (11:0). Also FLASH_PRETPE is 14 bit wide (13:0) and must be initialised from the value in EPPARA4. So there are 3 different bit widths documented for what should be the same value. In addition the PY32F002A flash driver (PY32F0xx_20.FLM) contained in the Keil Device Family Pack v1.2.1 (archive.org copy) provided by Puya stores the full upper 16 bits of EPPARA4 into FLASH_PRETPE. So I'm going to assume that the reserved bits are 0 and will keep the 0x3fff mask which matches the documented FLASH_PRETPE size (14 bits) and has been tested before.

It's been a week without feedback from @ArcaneNibble so we'll probably need to continue without their assistance. I've had a closer look at this and it's quite a mess. The PY32F002A Reference Manual says EPPARA4 26:16 (11 bit) contain the `PRETPE` value but that it's 12 bit wide (11:0). Also `FLASH_PRETPE` is 14 bit wide (13:0) and must be initialised from the value in `EPPARA4`. So there are 3 different bit widths documented for what should be the same value. In addition the PY32F002A flash driver (`PY32F0xx_20.FLM`) contained in the [Keil Device Family Pack v1.2.1](https://www.puyasemi.com/download_path/%E5%B7%A5%E5%85%B7/MCU%20%E5%BE%AE%E5%A4%84%E7%90%86%E5%99%A8/PY32F0xx_Keil_DFP_V1.2.1.zip) ([archive.org copy](https://web.archive.org/web/20230205071913if_/https://www.puyasemi.com/uploadfiles/2022/11/PY-MCU%E8%B5%84%E6%96%99-20221117.rar)) provided by Puya stores the full upper 16 bits of `EPPARA4` into `FLASH_PRETPE`. So I'm going to assume that the reserved bits are 0 and will keep the 0x3fff mask which matches the documented `FLASH_PRETPE` size (14 bits) and has been tested before.
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |

Given the conflicting documentation and such, that seems like a solid plan. If it turns out to be wrong in some way, a further PR can be opened and merged to fix it - so no worries there.

Given the conflicting documentation and such, that seems like a solid plan. If it turns out to be wrong in some way, a further PR can be opened and merged to fix it - so no worries there.
ArcaneNibble (Migrated from github.com) reviewed 2024年11月19日 17:25:09 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
ArcaneNibble (Migrated from github.com) commented 2024年11月19日 17:25:09 +01:00
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Hi, our personal life has been a bit on fire. Apologies. I hope to review this in a few hours.

Hi, our personal life has been a bit on fire. Apologies. I hope to review this in a few hours.
ArcaneNibble (Migrated from github.com) reviewed 2024年11月19日 17:26:02 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
ArcaneNibble (Migrated from github.com) commented 2024年11月19日 17:26:02 +01:00
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cc our partner @jediminer543 to see if she has any spoons to look at it

cc our partner @jediminer543 to see if she has any spoons to look at it
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |

Ah, thanks for getting back to this - sorry to hear you're having personal life troubles and thank you for putting time in to this despite that.

Ah, thanks for getting back to this - sorry to hear you're having personal life troubles and thank you for putting time in to this despite that.
ArcaneNibble (Migrated from github.com) reviewed 2024年11月19日 19:15:06 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
ArcaneNibble (Migrated from github.com) commented 2024年11月19日 19:15:06 +01:00
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Okay, we've gone and double-checked:

  • the mask 0x3fff (14 bits) is what the vendor HAL uses (in py32f0xx_hal_flash.h)
  • the mask 0xffff (16 bits) is what the vendor DFP uses (in FlashPrg.c), but we did not look in this code or notice it when originally implementing support
  • the "PY32F030 Reference Manual V1.1" (English) indeed has all of the inconsistencies pointed out above. This appears to be the only source floating around on my hard drive which indicates anything fewer than 14 bits
  • the "PY32F002A 参考手册 V1.1" (Chinese) is internally consistent, indicating 14 bits everywhere

This appears... most consistent with keeping the mask as 0x3fff for now?


As a separate issue, the PY32F002A is widely suspected to contain the same die as the PY32F030. It's not clear whether or not the 002A and the 030 would have different DEV_ID in the IDCODE (i.e. does IDCODE identify the die? the final packaged part? something else entirely?). I wouldn't be entirely confident in asserting that 0x60001000 is definitely the 002A, but I don't know how you'd want to handle this without additional information (I don't have any 030 around)

Incidentally, the 002A seems to have disappeared from the vendor's website entirely (the 002B is still there, but the 002B is suspected to be a different die). I can't find any PCNs regarding it (or any PCNs at all), so I don't know what to make of this.

Okay, we've gone and double-checked: * the mask 0x3fff (14 bits) is what the vendor HAL uses (in `py32f0xx_hal_flash.h`) * the mask 0xffff (16 bits) is what the vendor DFP uses (in `FlashPrg.c`), but we did not look in this code or notice it when originally implementing support * the "PY32F030 Reference Manual V1.1" (English) indeed has all of the inconsistencies pointed out above. This appears to be the only source floating around on my hard drive which indicates anything fewer than 14 bits * the "PY32F002A 参考手册 V1.1" (Chinese) is internally consistent, indicating 14 bits everywhere This appears... most consistent with keeping the mask as 0x3fff for now? <hr> As a separate issue, the PY32F002A is widely suspected to contain the same die as the PY32F030. It's not clear whether or not the 002A and the 030 would have different `DEV_ID` in the `IDCODE` (i.e. does `IDCODE` identify the die? the final packaged part? something else entirely?). I wouldn't be entirely confident in asserting that `0x60001000` is *definitely* the 002A, but I don't know how you'd want to handle this without additional information (I don't have any 030 around) Incidentally, the 002A seems to have disappeared from the vendor's website entirely (the 002B is still there, but the 002B is suspected to be a different die). I can't find any PCNs regarding it (or any PCNs at all), so I don't know what to make of this.
ArcaneNibble (Migrated from github.com) reviewed 2024年11月19日 19:28:30 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
ArcaneNibble (Migrated from github.com) commented 2024年11月19日 19:28:30 +01:00
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Some hardware tests on a PY32F002A that happened to be on hand:

  • FLASH_PRETPE contains 14 settable bits, with the rest being ignored
(gdb) set *(int*)0x40022120 = 0xffffffff
(gdb) x/1xw 0x40022120
0x40022120:	0x00003fff
  • the calibration value at 0x1fff0f7c (aka EPPARA4 for 24 MHz) contains the value 0x12c05dc0. This means that 11 or 12 bits is probably not correct

In conclusion, 14 bits is likely the correct width for the PRETPE calibration value.

Some hardware tests on a PY32F002A that happened to be on hand: * `FLASH_PRETPE` contains 14 settable bits, with the rest being ignored ``` (gdb) set *(int*)0x40022120 = 0xffffffff (gdb) x/1xw 0x40022120 0x40022120: 0x00003fff ``` * the calibration value at `0x1fff0f7c` (aka `EPPARA4` for 24 MHz) contains the value `0x12c05dc0`. This means that 11 or 12 bits is *probably not correct* In conclusion, *14 bits* is likely the correct width for the `PRETPE` calibration value.
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |

That's excellent - hopefully that gets silbe sorted out on what needs to happen here so this PR can get finished up then 😄

That's excellent - hopefully that gets silbe sorted out on what needs to happen here so this PR can get finished up then 😄
silbe (Migrated from github.com) reviewed 2024年11月19日 21:00:57 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月19日 21:00:57 +01:00
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@ArcaneNibble Thanks a lot for spending the time and all the information! Good to know that there are differences between the English and Chinese versions of the datasheet even regarding bit assignments in the registers. I just checked for the PY32F002B and indeed the Chinese version is more consistent. 😕

Agree that we should stick with 14 bits for the PY32F002A. Regarding the chip/driver identification string, until somebody tries this with a PY32F030 we won't know a) what its ID code is and b) whether it will actually work with the current code. So displaying "PY32F002A" would be the best match for now IMO (but I don't feel strongly about it). It also has the highest chance of getting reports from users when PY32F030 happens to work (which means we can ask them for the ID code that was matched).

@ArcaneNibble Thanks a lot for spending the time and all the information! Good to know that there are differences between the English and Chinese versions of the datasheet even regarding bit assignments in the registers. I just checked for the PY32F002B and indeed the Chinese version is more consistent. :confused: Agree that we should stick with 14 bits for the PY32F002A. Regarding the chip/driver identification string, until somebody tries this with a PY32F030 we won't know a) what its ID code is and b) whether it will actually work with the current code. So displaying "PY32F002A" would be the best match for now IMO (but I don't feel strongly about it). It also has the highest chance of getting reports from users when PY32F030 happens to work (which means we can ask them for the ID code that was matched).
silbe (Migrated from github.com) reviewed 2024年11月19日 21:15:27 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月19日 21:15:27 +01:00
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FYI: After adding the comment regarding EPPARA4 for PY32F002A I retested mostly pro forma and ran into lots of trouble. Even the previous version which worked fine last week now shows intermittent failures. Of course, the less debug output is provided, the more likely it is to fail, with direct usage of the "serial" interface from GDB failing quite often (so I guess it's timing related in some way).
Configuring the SWD frequency to around 100kHz (actual frequency around 190kHz) did not help.
I also tried not writing the timing parameters in puya_flash_prepare() as both PY32F002Bxx_24.FLM and CMSIS/Flash/PY32F002Bxx/FlashPrg.c in the Puya Keil DFP don't do this either, but the effects are the same.

Guess I need to attach a logic analyser to find out what failed. It'll probably be a while until I get around to that so I will mark this MR as draft and push the current code in case somebody else wants to pick it up in the meantime.

FYI: After adding the comment regarding `EPPARA4` for PY32F002A I retested mostly pro forma and ran into lots of trouble. Even the previous version which worked fine last week now shows intermittent failures. Of course, the less debug output is provided, the more likely it is to fail, with direct usage of the "serial" interface from GDB failing quite often (so I guess it's timing related in some way). Configuring the SWD frequency to around 100kHz (actual frequency around 190kHz) did not help. I also tried not writing the timing parameters in `puya_flash_prepare()` as both `PY32F002Bxx_24.FLM` and `CMSIS/Flash/PY32F002Bxx/FlashPrg.c` in the Puya Keil DFP don't do this either, but the effects are the same. Guess I need to attach a logic analyser to find out what failed. It'll probably be a while until I get around to that so I will mark this MR as draft and push the current code in case somebody else wants to pick it up in the meantime.
silbe (Migrated from github.com) reviewed 2024年11月19日 21:22:12 +01:00
@ -102,0 +179,4 @@
* | PY32F002AL15S6 | 0x60001000 | 0xffec0013 |
* | PY32F002AW15U? | 0x60001000 | ? |
* | PY32F002BD15S6 | 0x20220064 | 0x00000000 |
* | PY32F002BF15P6 | 0x20220064 | 0x00000000 |
silbe (Migrated from github.com) commented 2024年11月19日 21:22:12 +01:00
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BTW, thanks for the review so far!

BTW, thanks for the review so far!
silbe commented 2025年04月23日 23:26:38 +02:00 (Migrated from github.com)
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Finally gotten around to working on this again. After rebasing on current master and swapping out the cables there's no more trouble with the PY32F002B chips.

Because I was curious about the IDCODEs, I got a bunch more models and even have them working now:

Model IDCODE FLASH_RAM_SZ
PY32F002AF15P6 0x60001000 0xffec0013
PY32F002AL15S6 0x60001000 0xffec0013
PY32F002BD15S6 0x20220064 0x00000000
PY32F002BF15P6 0x20220064 0x00000000
PY32F003L24D6 0x60001000 0xfffe0001
PY32F030F18P6 0x60001000 0xffc80037
PY32F030F38P6 0x60001000 0xffc80037
PY32M070K1BU7-C 0x06188061 n/a
Finally gotten around to working on this again. After rebasing on current master and swapping out the cables there's no more trouble with the PY32F002B chips. Because I was curious about the IDCODEs, I got a bunch more models and even have them working now: | Model | IDCODE | FLASH_RAM_SZ | | ------------------------- | ---------- | ------------ | | PY32F002AF15P6 | 0x60001000 | 0xffec0013 | | PY32F002AL15S6 | 0x60001000 | 0xffec0013 | | PY32F002BD15S6 | 0x20220064 | 0x00000000 | | PY32F002BF15P6 | 0x20220064 | 0x00000000 | | PY32F003L24D6 | 0x60001000 | 0xfffe0001 | | PY32F030F18P6 | 0x60001000 | 0xffc80037 | | PY32F030F38P6 | 0x60001000 | 0xffc80037 | | PY32M070K1BU7-C | 0x06188061 | n/a |
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