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An emulator for a 16-bit minicomputer that never existed—and eventually an assembler for that machine. The machine is a register-register architecture with non-volatile memory. It features: - 16-bit word size - 16 general-purpose registers (R0–RF) - Register file with hidden overflow register (captures upper 16 bits of arithmetic results) - 64K independent stack (16-bit words), managed by untouchable stack pointer - Program counter (untouchable except via JMP/JSR) - Privilege levels (Hardware, OS, Library, User) with gating - Single-level interrupt handling with explicit enable/disable - Context save/restore with selective register updates - 512 I/O ports (Read Port / Write Port instructions) - 16-bit character encoding (ASCII + 256 custom glyphs) Planned I/O: - ANSI-compatible console terminal (color text output) - High-speed paper tape reader/punch (file I/O) This is a learning/reference project—a complete ISA design from first principles, targeting a Plan 9/Inferno-inspired cluster OS.
  • C 91.9%
  • Makefile 8.1%
2026年06月26日 18:58:48 -07:00
.16bit.c Framework in place ^c to break out handler works 2026年06月26日 18:58:48 -07:00
.16bit.txt Initial 16-bit ISA specification and design 2026年06月26日 17:35:04 -07:00
.gitignore Initial 16-bit ISA specification and design 2026年06月26日 17:35:04 -07:00
16bit Framework in place ^c to break out handler works 2026年06月26日 18:58:48 -07:00
16bit.c Framework in place ^c to break out handler works 2026年06月26日 18:58:48 -07:00
16bit.env Framework in place ^c to break out handler works 2026年06月26日 18:58:48 -07:00
16bit.txt Initial 16-bit ISA specification and design 2026年06月26日 17:35:04 -07:00
LICENSE Initial commit 2026年06月27日 02:20:30 +02:00
Makefile Framework in place ^c to break out handler works 2026年06月26日 18:58:48 -07:00
README.md Initial commit 2026年06月27日 02:20:30 +02:00

16bit

An emulator for a 16-bit minicomputer that never existed—and eventually an assembler for that machine.

The machine is a register-register architecture with non-volatile memory. It features:

  • 16-bit word size
  • 16 general-purpose registers (R0–RF)
  • Register file with hidden overflow register (captures upper 16 bits of arithmetic results)
  • 64K independent stack (16-bit words), managed by untouchable stack pointer
  • Program counter (untouchable except via JMP/JSR)
  • Privilege levels (Hardware, OS, Library, User) with gating
  • Single-level interrupt handling with explicit enable/disable
  • Context save/restore with selective register updates
  • 512 I/O ports (Read Port / Write Port instructions)
  • 16-bit character encoding (ASCII + 256 custom glyphs)

Planned I/O:

  • ANSI-compatible console terminal (color text output)
  • High-speed paper tape reader/punch (file I/O)

This is a learning/reference project—a complete ISA design from first principles, targeting a Plan 9/Inferno-inspired cluster OS.