author | pcpa <paulo.cesar.pereira.de.andrade@gmail.com> | 2023年02月26日 13:58:37 -0300 |
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committer | pcpa <paulo.cesar.pereira.de.andrade@gmail.com> | 2023年02月26日 13:58:37 -0300 |
commit | 7e1cb2716cde02d3069348eedf9c73e3093598fc (patch) | |
tree | beb1852944ee202351ea2065a44451f78df3d781 /lib | |
parent | 79fbe0ab54e5439d3895bdbfe84877af22086905 (diff) | |
download | lightning-7e1cb2716cde02d3069348eedf9c73e3093598fc.tar.gz |
-rw-r--r-- | lib/jit_mips-cpu.c | 4 | ||||
-rw-r--r-- | lib/jit_mips.c | 10 |
diff --git a/lib/jit_mips-cpu.c b/lib/jit_mips-cpu.c index 59ffceb..0e1f0ed 100644 --- a/lib/jit_mips-cpu.c +++ b/lib/jit_mips-cpu.c @@ -1218,7 +1218,7 @@ _jit_get_reg_for_delay_slot(jit_state_t *_jit, jit_int32_t mask, assert(i.ic.b == 0); /* If these cop1 instructions in delay slot * wont work */ - if (!jit_cpu.cop1_delay == 0) + if (!jit_cpu.cop1_delay) flush(); if (mask & jit_class_gpr) { regs[0] = i.rt.b; @@ -1422,7 +1422,7 @@ _jit_get_reg_for_delay_slot(jit_state_t *_jit, jit_int32_t mask, case MIPS_SWC1: /* 39 */ case MIPS_SDC1: /* 3d */ /* If these cop1 instructions in delay wont not work */ - if (!jit_cpu.cop1_delay == 0) + if (!jit_cpu.cop1_delay) flush(); if (mask & jit_class_gpr) { regs[0] = i.rs.b; diff --git a/lib/jit_mips.c b/lib/jit_mips.c index 55bc8ee..b3a8078 100644 --- a/lib/jit_mips.c +++ b/lib/jit_mips.c @@ -211,6 +211,9 @@ jit_get_cpu(void) /* Cavium Octeon III V0.2 FPU V0.0 */ else if (strstr(buf + 13, "FPU V0.0")) jit_cpu.sll_delay = jit_cpu.cop1_delay = 0; + /* Cavium Octeon II V0.1 */ + else if (strstr(buf + 13, " II ")) + jit_cpu.sll_delay = jit_cpu.cop1_delay = 0; break; } } @@ -227,13 +230,14 @@ jit_get_cpu(void) if (!jit_cpu.release) jit_cpu.release = __mips; #endif - /* Assume all mips 1, or detected as release 1 has this problem */ + /* Assume all mips 1 and 2, or detected as release 1 or 2 have this + * problem */ /* Note that jit_cpu is global, and can be overriden, that is, add * the C code "jit_cpu.cop1_delay = 1;" after the call to init_jit() * if it is functional. */ - if (jit_cpu.cop1_delay && jit_cpu.release < 2) + if (jit_cpu.cop1_delay && jit_cpu.release < 3) jit_cpu.cop1_delay = 0; - if (jit_cpu.sll_delay && jit_cpu.release < 2) + if (jit_cpu.sll_delay && jit_cpu.release < 3) jit_cpu.sll_delay = 0; } |