Implement a simple compare and swap atomic operation. - lightning.git - Portable just-in-time compiler library

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authorpcpa <paulo.cesar.pereira.de.andrade@gmail.com>2022年09月08日 16:48:43 -0300
committerpcpa <paulo.cesar.pereira.de.andrade@gmail.com>2022年09月08日 16:48:43 -0300
commitd5a7c8e4ad719e84dbb4904c532f906a1ef5a77b (patch)
tree58f01a849950cef4f32cbfbf4fd036d17ece66d7 /lib/lightning.c
parente7a4ea8828be7c71140b5a0ca4f891d0053c64a5 (diff)
downloadlightning-d5a7c8e4ad719e84dbb4904c532f906a1ef5a77b.tar.gz
Implement a simple compare and swap atomic operation.
* lib/jit_fallback.c: Implement fallback compare and swap with pthreads. * check/Makefile.am: Update for new cas{r,i} simple test. * check/catomic.c, check/catomic.ok: New test case for simple compare and swap atomic operation. * check/lightning.c: Add entries to be able to use the new compare and swap atomic operation. Still missing a general test, only the basic C version. * include/lightning.h.in: Include pthread.h, even if not needing a fallback compare and swap. * include/lightning/jit_private.h: Add support for a register pair in second argument. Required by the new casr and casi operations. * lib/jit_aarch64-cpu.c, lib/jit_aarch64-sz.c, lib/jit_aarch64.c, lib/jit_ppc-cpu.c, lib/jit_ppc-sz.c, lib/jit_ppc.c, lib/jit_x86-cpu.c, lib/jit_x86-sz.c, lib/jit_x86.c: Implement inline code for compare and swap. * lib/jit_arm-cpu.c, lib/jit_arm-sz.c, lib/jit_arm.c: Implement inline code for compare and swap if cpu is armv7, otherwise, use a fallback with pthreads. * lib/jit_alpha-cpu.c, lib/jit_alpha-sz.c, lib/jit_alpha.c, lib/jit_hppa-cpu.c, lib/jit_hppa-sz.c, lib/jit_hppa.c, lib/jit_ia64-cpu.c, lib/jit_ia64-sz.c, lib/jit_ia64.c, lib/jit_mips-cpu.c, lib/jit_mips-sz.c, lib/jit_mips.c, lib/jit_riscv-cpu.c, lib/jit_riscv-sz.c, lib/jit_riscv.c, lib/jit_s390-cpu.c, lib/jit_s390-sz.c, lib/jit_s390.c, lib/jit_sparc-cpu.c, lib/jit_sparc-sz.c, lib/jit_sparc.c: Implement fallback compare and swap with pthreads. At least some of these should be updated for inline code generation. * lib/jit_names.c, lib/jit_print.c: lib/lightning.c: Update for the new compare and swap operation. * doc/body.texi: Add simple documentation of the compare and swap new operation.
Diffstat (limited to 'lib/lightning.c')
-rw-r--r--lib/lightning.c 148
1 files changed, 123 insertions, 25 deletions
diff --git a/lib/lightning.c b/lib/lightning.c
index 51456be..d219e6d 100644
--- a/lib/lightning.c
+++ b/lib/lightning.c
@@ -1139,6 +1139,20 @@ _jit_new_node_qww(jit_state_t *_jit, jit_code_t code,
}
jit_node_t *
+_jit_new_node_wwq(jit_state_t *_jit, jit_code_t code,
+ jit_word_t u, jit_word_t v,
+ jit_int32_t l, jit_int32_t h)
+{
+ jit_node_t *node = new_node(code);
+ assert(!_jitc->realize);
+ node->u.w = u;
+ node->v.w = v;
+ node->w.q.l = l;
+ node->w.q.h = h;
+ return (link_node(node));
+}
+
+jit_node_t *
_jit_new_node_wwf(jit_state_t *_jit, jit_code_t code,
jit_word_t u, jit_word_t v, jit_float32_t w)
{
@@ -1539,6 +1553,14 @@ _jit_classify(jit_state_t *_jit, jit_code_t code)
case jit_code_movnr: case jit_code_movzr:
mask = jit_cc_a0_reg|jit_cc_a0_cnd|jit_cc_a1_reg|jit_cc_a2_reg;
break;
+ case jit_code_casr:
+ mask = jit_cc_a0_reg|jit_cc_a0_chg|jit_cc_a1_reg|
+ jit_cc_a2_reg|jit_cc_a2_rlh;
+ break;
+ case jit_code_casi:
+ mask = jit_cc_a0_reg|jit_cc_a0_chg|jit_cc_a1_int|
+ jit_cc_a2_reg|jit_cc_a2_rlh;
+ break;
default:
abort();
}
@@ -1806,13 +1828,24 @@ _jit_reglive(jit_state_t *_jit, jit_node_t *node)
else
jit_regset_setbit(&_jitc->reglive, node->v.w);
}
- if ((value & jit_cc_a2_reg) && !(node->w.w & jit_regno_patch)) {
- if (value & jit_cc_a2_chg) {
- jit_regset_clrbit(&_jitc->reglive, node->w.w);
- jit_regset_setbit(&_jitc->regmask, node->w.w);
+ if (value & jit_cc_a2_reg) {
+ if (value & jit_cc_a2_rlh) {
+ /* Assume registers are not changed */
+ if (!(node->w.q.l & jit_regno_patch))
+ jit_regset_setbit(&_jitc->reglive, node->w.q.l);
+ if (!(node->w.q.h & jit_regno_patch))
+ jit_regset_setbit(&_jitc->reglive, node->w.q.h);
+ }
+ else {
+ if (!(node->w.w & jit_regno_patch)) {
+ if (value & jit_cc_a2_chg) {
+ jit_regset_clrbit(&_jitc->reglive, node->w.w);
+ jit_regset_setbit(&_jitc->regmask, node->w.w);
+ }
+ else
+ jit_regset_setbit(&_jitc->reglive, node->w.w);
+ }
}
- else
- jit_regset_setbit(&_jitc->reglive, node->w.w);
}
if (jit_regset_set_p(&_jitc->regmask)) {
jit_update(node->next, &_jitc->reglive, &_jitc->regmask);
@@ -1843,8 +1876,14 @@ _jit_regarg_set(jit_state_t *_jit, jit_node_t *node, jit_int32_t value)
}
if (value & jit_cc_a1_reg)
jit_regset_setbit(&_jitc->regarg, jit_regno(node->v.w));
- if (value & jit_cc_a2_reg)
- jit_regset_setbit(&_jitc->regarg, jit_regno(node->w.w));
+ if (value & jit_cc_a2_reg) {
+ if (value & jit_cc_a2_rlh) {
+ jit_regset_setbit(&_jitc->regarg, jit_regno(node->w.q.l));
+ jit_regset_setbit(&_jitc->regarg, jit_regno(node->w.q.h));
+ }
+ else
+ jit_regset_setbit(&_jitc->regarg, jit_regno(node->w.w));
+ }
}
void
@@ -1863,8 +1902,14 @@ _jit_regarg_clr(jit_state_t *_jit, jit_node_t *node, jit_int32_t value)
}
if (value & jit_cc_a1_reg)
jit_regset_clrbit(&_jitc->regarg, jit_regno(node->v.w));
- if (value & jit_cc_a2_reg)
- jit_regset_clrbit(&_jitc->regarg, jit_regno(node->w.w));
+ if (value & jit_cc_a2_reg) {
+ if (value & jit_cc_a2_rlh) {
+ jit_regset_clrbit(&_jitc->regarg, jit_regno(node->w.q.l));
+ jit_regset_clrbit(&_jitc->regarg, jit_regno(node->w.q.h));
+ }
+ else
+ jit_regset_clrbit(&_jitc->regarg, jit_regno(node->w.w));
+ }
}
void
@@ -2302,11 +2347,26 @@ _jit_follow(jit_state_t *_jit, jit_block_t *block, jit_bool_t *todo)
default:
value = jit_classify(node->code);
if (value & jit_cc_a2_reg) {
- if (!(node->w.w & jit_regno_patch)) {
- if (jit_regset_tstbit(&regmask, node->w.w)) {
- jit_regset_clrbit(&regmask, node->w.w);
- if (!(value & jit_cc_a2_chg))
- jit_regset_setbit(&reglive, node->w.w);
+ if (value & jit_cc_a2_rlh) {
+ if (!(node->w.q.l & jit_regno_patch)) {
+ /* Assume register is not changed */
+ if (jit_regset_tstbit(&regmask, node->w.q.l))
+ jit_regset_clrbit(&regmask, node->w.q.l);
+ }
+ if (!(node->w.q.h & jit_regno_patch)) {
+ if (jit_regset_tstbit(&regmask, node->w.q.h))
+ jit_regset_clrbit(&regmask, node->w.q.h);
+ }
+ }
+ else {
+ if (value & jit_cc_a2_reg) {
+ if (!(node->w.w & jit_regno_patch)) {
+ if (jit_regset_tstbit(&regmask, node->w.w)) {
+ jit_regset_clrbit(&regmask, node->w.w);
+ if (!(value & jit_cc_a2_chg))
+ jit_regset_setbit(&reglive, node->w.w);
+ }
+ }
}
}
}
@@ -2453,11 +2513,24 @@ _jit_update(jit_state_t *_jit, jit_node_t *node,
default:
value = jit_classify(node->code);
if (value & jit_cc_a2_reg) {
- if (!(node->w.w & jit_regno_patch)) {
- if (jit_regset_tstbit(mask, node->w.w)) {
- jit_regset_clrbit(mask, node->w.w);
- if (!(value & jit_cc_a2_chg))
- jit_regset_setbit(live, node->w.w);
+ if (value & jit_cc_a2_rlh) {
+ if (!(node->w.q.l & jit_regno_patch)) {
+ /* Assume register is not changed */
+ if (jit_regset_tstbit(mask, node->w.q.l))
+ jit_regset_clrbit(mask, node->w.q.l);
+ }
+ if (!(node->w.q.h & jit_regno_patch)) {
+ if (jit_regset_tstbit(mask, node->w.q.h))
+ jit_regset_clrbit(mask, node->w.q.h);
+ }
+ }
+ else {
+ if (!(node->w.w & jit_regno_patch)) {
+ if (jit_regset_tstbit(mask, node->w.w)) {
+ jit_regset_clrbit(mask, node->w.w);
+ if (!(value & jit_cc_a2_chg))
+ jit_regset_setbit(live, node->w.w);
+ }
}
}
}
@@ -3298,9 +3371,24 @@ _simplify(jit_state_t *_jit)
++_jitc->gen[regno];
}
if (info & jit_cc_a2_chg) {
- regno = jit_regno(node->w.w);
- _jitc->values[regno].kind = 0;
- ++_jitc->gen[regno];
+#if 0
+ /* Assume registers are not changed */
+ if (info & jit_cc_a2_rlh) {
+ regno = jit_regno(node->w.q.l);
+ _jitc->values[regno].kind = 0;
+ ++_jitc->gen[regno];
+ regno = jit_regno(node->w.q.h);
+ _jitc->values[regno].kind = 0;
+ ++_jitc->gen[regno];
+ }
+ else {
+#endif
+ regno = jit_regno(node->w.w);
+ _jitc->values[regno].kind = 0;
+ ++_jitc->gen[regno];
+#if 0
+ }
+#endif
}
break;
}
@@ -3505,8 +3593,18 @@ _patch_register(jit_state_t *_jit, jit_node_t *node, jit_node_t *link,
}
if ((value & jit_cc_a1_reg) && node->v.w == regno)
node->v.w = patch;
- if ((value & jit_cc_a2_reg) && node->w.w == regno)
- node->w.w = patch;
+ if (value & jit_cc_a2_reg) {
+ if (value & jit_cc_a2_rlh) {
+ if (node->w.q.l == regno)
+ node->w.q.l = patch;
+ if (node->w.q.h == regno)
+ node->w.q.h = patch;
+ }
+ else {
+ if (node->w.w == regno)
+ node->w.w = patch;
+ }
+ }
}
}
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