Authenticated Encryption FPGA Ranking

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All results are categorized in groups, e.g., Algorithm, Design , Platform, etc. Clicking on the group name reveals additional columns for the respective group. Clicking on the group name again collapses the group.

Each column has a column title e.g. Result ID, Primary Opt. Target, TP [Mbits/s] (meaning Throughput) etc. Clicking on the column title sorts the column in ascending order, clicking on it again sorts it in descending order. In addition, the little arrow next to the title changes color to indicate the sort order and the column is shaded. A second order of sorting can be achieved by pressing the "Shift" key on the keyboard and then clicking on another column title.

At the bottom of each column is a search box. Any entry in these boxes is only applied to the respective column. The search is not case sensitive, and is regex based. An OR operation can be accomplished by surrounding search terms w/ parenthesis and seperating them with a pipe, like so: 

(term1|term2)
The number of results matching the current search criteria is shown at the end of the table, below the paging buttons.

Clicking on a Result ID opens a page that shows all details about that particular result.

To compare two results, click one result, then another to compare against. Then click the 'Compare Selected Results' action

In order to preserve the state of the table when examining a result, please right-click and select "open in new window" or "open in new tab". Alternatively, use middle click on a result id.

Numeric and date columns may be searched using by specifying a range in ISO interval notation, or a simple one sided bound using >. For example, to search for all results with values between 1000 and 2000, inclusive, use: 

[1000,2000]
To search for values greater than 2000 exclusive, use: 
> 2000
Date ranges may also be entered using a date picker, activated by clicking "Enter Date Range" below the appropriate field.

The "Enable Unique" link in the algorithms columns limits results to one per algorithm.



Result Filtering
    • CAESAR Round 3 (Round 3 Variants)
      • Use Case 1: Lightweight applications
      • Use Case 2: High-performance applications
      • Use Case 3: Defense in-depth
    • CAESAR Round 3 (Round 2 Variants)
      • Use Case 1: Lightweight applications
      • Use Case 2: High Performance applications
      • Use Case 3: Defense in-depth
    • CAESAR Round 2
    • CAESAR Round 1
    • Standards
    • Register Transfer Level
    • High Level Synthesis
    • Any
    • CAESAR Hardware API v1
    • GMU_AEAD_Core_API_v1
    • GMU_AEAD_Core_API_v0
    • Full-Block width (custom)
    • From To
    • Any
    • Yes
    • No
    • Any

    • Without Embedded Resources (Block Memories, DSP Units, etc.)
    • Without Primitives or Megafunctions
    • LUTs
    • Slices
    • ALUTs
    • LEs
    • ALMs
    • Authenticated Encryption
    • Authenticated Decryption
    • Authentication Only
    • Throughput/Area
    • Throughput
    • Area


Compare Selected

Result ID Algorithm Key Size [bits] Impl Approach Hardware API Arch Type Primary Opt Target (Auth-Only TP)/ALM [(Mbits/s)/ALM] (Auth-Only TP)/LE [(Mbits/s)/LE] (Auth-Only TP)/ALUT [(Mbits/s)/ALUT] (Auth-Only TP)/Slice [(Mbits/s)/Slice] (Auth-Only TP)/LUT [(Mbits/s)/LUT] (Dec/Auth TP)/ALM [(Mbits/s)/ALM] (Dec/Auth TP)/LE [(Mbits/s)/LE] (Dec/Auth TP)/ALUT [(Mbits/s)/ALUT] (Dec/Auth TP)/Slice [(Mbits/s)/Slice] (Dec/Auth TP)/LUT [(Mbits/s)/LUT] (Enc/Auth TP)/ALM [(Mbits/s)/ALM] (Enc/Auth TP)/LE [(Mbits/s)/LE] (Enc/Auth TP)/ALUT [(Mbits/s)/ALUT] (Enc/Auth TP)/Slice [(Mbits/s)/Slice] (Enc/Auth TP)/LUT [(Mbits/s)/LUT] Auth-Only TP [Mbits/s] Enc/Auth TP [Mbits/s] Dec/Auth TP [Mbits/s] Impl Freq [MHz] ALMs LEs ALUTs LUTs CLB Slices BRAMs Memory Bits DSPs MULTs Primary Designer Affiliation Primary Designer Name(s) Family group Megafunctions or Primitives

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