Re: [PATCH] iio: accel: mma8452: fix indentation
From: Jonathan Cameron
Date: Sat Feb 27 2021 - 10:57:12 EST
On 2021年2月26日 12:11:42 +0100
Sean Nyekjaer <sean@xxxxxxxxxx> wrote:
>
Improve readability by using empty linies instead of extra spaces.
>
>
Signed-off-by: Sean Nyekjaer <sean@xxxxxxxxxx>
>
---
>
drivers/iio/accel/mma8452.c | 120 ++++++++++++++++++++----------------
>
1 file changed, 67 insertions(+), 53 deletions(-)
>
>
diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
>
index b0176d936423..9fc1f7550b9c 100644
>
--- a/drivers/iio/accel/mma8452.c
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+++ b/drivers/iio/accel/mma8452.c
>
@@ -34,52 +34,66 @@
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#include <linux/regulator/consumer.h>
>
>
#define MMA8452_STATUS 0x00
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-#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
>
+#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
This indentation is deliberate. It is to visibly distinguish register
addresses from the fields.
>
+
>
#define MMA8452_OUT_X 0x01 /* MSB first */
>
#define MMA8452_OUT_Y 0x03
>
#define MMA8452_OUT_Z 0x05
>
#define MMA8452_INT_SRC 0x0c
>
#define MMA8452_WHO_AM_I 0x0d
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+
>
#define MMA8452_DATA_CFG 0x0e
>
-#define MMA8452_DATA_CFG_FS_MASK GENMASK(1, 0)
>
-#define MMA8452_DATA_CFG_FS_2G 0
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-#define MMA8452_DATA_CFG_FS_4G 1
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-#define MMA8452_DATA_CFG_FS_8G 2
>
-#define MMA8452_DATA_CFG_HPF_MASK BIT(4)
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+#define MMA8452_DATA_CFG_FS_MASK GENMASK(1, 0)
>
+#define MMA8452_DATA_CFG_FS_2G 0
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+#define MMA8452_DATA_CFG_FS_4G 1
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+#define MMA8452_DATA_CFG_FS_8G 2
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+#define MMA8452_DATA_CFG_HPF_MASK BIT(4)
>
+
>
#define MMA8452_HP_FILTER_CUTOFF 0x0f
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-#define MMA8452_HP_FILTER_CUTOFF_SEL_MASK GENMASK(1, 0)
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+#define MMA8452_HP_FILTER_CUTOFF_SEL_MASK GENMASK(1, 0)
>
+
>
#define MMA8452_FF_MT_CFG 0x15
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-#define MMA8452_FF_MT_CFG_OAE BIT(6)
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-#define MMA8452_FF_MT_CFG_ELE BIT(7)
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+#define MMA8452_FF_MT_CFG_OAE BIT(6)
>
+#define MMA8452_FF_MT_CFG_ELE BIT(7)
>
+
>
#define MMA8452_FF_MT_SRC 0x16
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-#define MMA8452_FF_MT_SRC_XHE BIT(1)
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-#define MMA8452_FF_MT_SRC_YHE BIT(3)
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-#define MMA8452_FF_MT_SRC_ZHE BIT(5)
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+#define MMA8452_FF_MT_SRC_XHE BIT(1)
>
+#define MMA8452_FF_MT_SRC_YHE BIT(3)
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+#define MMA8452_FF_MT_SRC_ZHE BIT(5)
>
+
>
#define MMA8452_FF_MT_THS 0x17
>
-#define MMA8452_FF_MT_THS_MASK 0x7f
>
+#define MMA8452_FF_MT_THS_MASK 0x7f
>
+
>
#define MMA8452_FF_MT_COUNT 0x18
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-#define MMA8452_FF_MT_CHAN_SHIFT 3
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+#define MMA8452_FF_MT_CHAN_SHIFT 3
>
+
>
#define MMA8452_TRANSIENT_CFG 0x1d
>
-#define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
>
-#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
>
-#define MMA8452_TRANSIENT_CFG_ELE BIT(4)
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+#define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
>
+#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
>
+#define MMA8452_TRANSIENT_CFG_ELE BIT(4)
>
+
>
#define MMA8452_TRANSIENT_SRC 0x1e
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-#define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1)
>
-#define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3)
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-#define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5)
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+#define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1)
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+#define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3)
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+#define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5)
>
+
>
#define MMA8452_TRANSIENT_THS 0x1f
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-#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
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+#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
>
+
>
#define MMA8452_TRANSIENT_COUNT 0x20
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-#define MMA8452_TRANSIENT_CHAN_SHIFT 1
>
+#define MMA8452_TRANSIENT_CHAN_SHIFT 1
>
+
>
#define MMA8452_CTRL_REG1 0x2a
>
-#define MMA8452_CTRL_ACTIVE BIT(0)
>
-#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
>
-#define MMA8452_CTRL_DR_SHIFT 3
>
-#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
>
+#define MMA8452_CTRL_ACTIVE BIT(0)
>
+#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
>
+#define MMA8452_CTRL_DR_SHIFT 3
>
+#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
>
+
>
#define MMA8452_CTRL_REG2 0x2b
>
-#define MMA8452_CTRL_REG2_RST BIT(6)
>
-#define MMA8452_CTRL_REG2_MODS_SHIFT 3
>
-#define MMA8452_CTRL_REG2_MODS_MASK 0x1b
>
+#define MMA8452_CTRL_REG2_RST BIT(6)
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+#define MMA8452_CTRL_REG2_MODS_SHIFT 3
>
+#define MMA8452_CTRL_REG2_MODS_MASK 0x1b
>
+
>
#define MMA8452_CTRL_REG4 0x2d
>
#define MMA8452_CTRL_REG5 0x2e
>
#define MMA8452_OFF_X 0x2f
>
@@ -88,9 +102,9 @@
>
>
#define MMA8452_MAX_REG 0x31
>
>
-#define MMA8452_INT_DRDY BIT(0)
>
-#define MMA8452_INT_FF_MT BIT(2)
>
-#define MMA8452_INT_TRANS BIT(5)
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+#define MMA8452_INT_DRDY BIT(0)
>
+#define MMA8452_INT_FF_MT BIT(2)
>
+#define MMA8452_INT_TRANS BIT(5)
>
>
#define MMA8451_DEVICE_ID 0x1a
>
#define MMA8452_DEVICE_ID 0x2a
>
@@ -134,33 +148,33 @@ struct mma8452_data {
>
* used for different chips and the relevant registers are included here.
>
*/
The rest of the changes are fine if you want to respin the patch with the
earlier part dropped.
Jonathan
>
struct mma8452_event_regs {
>
- u8 ev_cfg;
>
- u8 ev_cfg_ele;
>
- u8 ev_cfg_chan_shift;
>
- u8 ev_src;
>
- u8 ev_ths;
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- u8 ev_ths_mask;
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- u8 ev_count;
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+ u8 ev_cfg;
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+ u8 ev_cfg_ele;
>
+ u8 ev_cfg_chan_shift;
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+ u8 ev_src;
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+ u8 ev_ths;
>
+ u8 ev_ths_mask;
>
+ u8 ev_count;
>
};
>
>
static const struct mma8452_event_regs ff_mt_ev_regs = {
>
- .ev_cfg = MMA8452_FF_MT_CFG,
>
- .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
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- .ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
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- .ev_src = MMA8452_FF_MT_SRC,
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- .ev_ths = MMA8452_FF_MT_THS,
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- .ev_ths_mask = MMA8452_FF_MT_THS_MASK,
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- .ev_count = MMA8452_FF_MT_COUNT
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+ .ev_cfg = MMA8452_FF_MT_CFG,
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+ .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
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+ .ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
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+ .ev_src = MMA8452_FF_MT_SRC,
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+ .ev_ths = MMA8452_FF_MT_THS,
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+ .ev_ths_mask = MMA8452_FF_MT_THS_MASK,
>
+ .ev_count = MMA8452_FF_MT_COUNT
>
};
>
>
static const struct mma8452_event_regs trans_ev_regs = {
>
- .ev_cfg = MMA8452_TRANSIENT_CFG,
>
- .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
>
- .ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
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- .ev_src = MMA8452_TRANSIENT_SRC,
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- .ev_ths = MMA8452_TRANSIENT_THS,
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- .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
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- .ev_count = MMA8452_TRANSIENT_COUNT,
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+ .ev_cfg = MMA8452_TRANSIENT_CFG,
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+ .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
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+ .ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
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+ .ev_src = MMA8452_TRANSIENT_SRC,
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+ .ev_ths = MMA8452_TRANSIENT_THS,
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+ .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
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+ .ev_count = MMA8452_TRANSIENT_COUNT,
>
};
>
>
/**