InfoQ Homepage Presentations A Crash Course in Modern Hardware
A Crash Course in Modern Hardware
Summary
In this presentation from the JVM Languages Summit 2009, Cliff Click discusses the Von Neumann architecture, CISC vs RISC, the rise of multicore, Instruction-Level Parallelism (ILP), pipelining, out-of-order dispatch, static vs dynamic ILP, performance impact of cache misses, memory performance, memory vs CPU caching, examples of memory/CPU cache interaction, and tips for improving performance.
Bio
With more than twenty-five years experience developing compilers, Cliff serves as Azul Systems' Chief JVM Architect. Cliff joined Azul in 2002 from Sun Microsystems where he was the architect and lead developer of the HotSpot Server Compiler, a technology that has delivered dramatic improvements in Java performance since its inception.
About the conference
The 2009 JVM Language Summit is an open technical collaboration among language designers, compiler writers, tool builders, runtime engineers, and VM architects. The talks inform the audience, in detail, about the state of the art of language design and implementation on the JVM, and the present and future capabilities of the JVM itself.
This content is in the Java topic
Related Topics:
Sponsored Content
-
Related Editorial
-
Related Sponsors
-
Popular across InfoQ
-
Google Launches Code Wiki, an AI-Driven System for Continuous, Interactive Code Documentation
-
Monzo’s Real-Time Fraud Detection Architecture with BigQuery and Microservices
-
Java News Roundup: Spring Framework 7.0, Spring Data, Spring AI, Payara Platform, OpenJDK, JobRunr
-
Reducing False Positives in Retrieval-Augmented Generation (RAG) Semantic Caching: a Banking Case Study
-
AnalogJS 2.0: Angular Full Stack Framework Introduces Content Resources & Leaner Builds
-
Cloud Security Challenges in the AI Era - How Running Containers and Inference Weaken Your System
-