User:Johnburger/Demo/Exec/PICs

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Revectoring the hardware Interrupt ReQuests (IRQs) from their legacy position to a more sensible one is something that nearly every x86-based system should do. The code is well understood, and most everyone does it the same way - and often with the same new values of 20h and 28h too!

But this time, with symbols!

You'll note that the last thing this code does is to re-disable interrupts. I really wish that initialising the PICs would have them by default leave all interrupts disabled. Unfortunately, it does the exact opposite. Ah well: I need to enable the Cascade interrupt on the Master anyway...

Demo/Exec/PICs.inc

;
; Exec/PICs.inc
;
; To service hardware Interrupt ReQuests, the PICs need to be changed from their
; arbitrary BIOS-set Real Mode values to more rational settings. Other modules
; can then install IRQ handlers for their particular devices.
;
; To program a PIC, you first give it the Init Cmd, then you program the Mask
; register a few times in a prescribed order. The details change depending on
; whether the PIC is a Master or a Slave.
Exec.PICs:
MOVAL,Dev.PIC.Cmd.Init; Initialise PICs
OUTDev.PIC.A.Cmd,AL
OUTDev.PIC.B.Cmd,AL
MOVAL,PIC.A.Base; Set PIC.A's Base
OUTDev.PIC.A.Mask,AL
MOVAL,PIC.B.Base; Set PIC.B's Base
OUTDev.PIC.B.Mask,AL
MOVAL,Dev.PIC.A.Cascade; Tell PIC.A where Slave is
OUTDev.PIC.A.Mask,AL
MOVAL,Dev.PIC.B.Cascade; Tell PIC.B where it is Slave
OUTDev.PIC.B.Mask,AL
MOVAL,Dev.PIC.Init.8086; 80x86 mode
OUTDev.PIC.A.Mask,AL
OUTDev.PIC.B.Mask,AL
MOVAL,~Dev.PIC.A.Cascade; Allow Cascade interrupts through
OUTDev.PIC.A.Mask,AL
MOVAL,0FFh; Mask all interrupts
OUTDev.PIC.B.Mask,AL
RET
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