On Mon, Sep 08, 2025 at 09:14:49PM +0200, Christian Marangi wrote: > On Mon, Sep 08, 2025 at 09:06:03PM +0200, Andrew Lunn wrote: > > On Mon, Sep 08, 2025 at 07:48:17PM +0200, Christian Marangi wrote: > > > On Mon, Sep 08, 2025 at 06:54:15PM +0200, Andrew Lunn wrote: > > > > On Mon, Sep 08, 2025 at 01:37:19PM +0200, Christian Marangi wrote: > > > > > With further testing with an attached Aeonsemi it was discovered that > > > > > the pinctrl MDIO function applied the wrong bitmask. The error was > > > > > probably caused by the confusing documentation related to these bits. > > > > > > > > > > Inspecting what the bootloader actually configure, the SGMII_MDIO_MODE > > > > > is never actually set but instead it's set force enable to the 2 GPIO > > > > > (gpio 1-2) for MDC and MDIO pin. > > > > > > > > Is the MDIO bus implemented using the GPIO bitbanging driver? > > > > > > > > > > No it does use the MDIO bus integrated in the MT7530 Switch. It's just > > > that the MDIO pin can be muxed as GPIO usage. > > > > Then i do not understand this patch. Why configure the pinmux for GPIO > > when you want it connected to the MDIO bus device? > > > > The usage of GPIO might be confusing but this is just to instruct the > SoC to not mess with those 2 PIN and as Benjamin reported it's also an > Errata of 7581. The FORCE_GPIO_EN doesn't set them as GPIO function > (that is configured by a different register) but it's really to actually > ""enable"" those lines. So please extent the commit message: FORCE_GPIO_EN does not actually force the pin to GPIO, but really means.... The commit message is the correct place to try to explain why the patch makes no sense, because FORCE_GPIO_EN is wrongly named. Andrew