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University of Oxford Department of Computer Science
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Automated Verification

The automated verification theme investigates theory and practice of formal verification and correct-by-construction synthesis for software and hardware systems. Our work spans a wide range of research, from studying decidability and complexity, through formulating process calculi, logics, semantic models and abstraction schemes, all the way to practical, machine-assisted methods applicable to real-world problems and programming languages such as C and Java. We focus on model checking, control and synthesis problems for concurrent, probabilistic, real time, hybrid, dynamical and infinite-state systems, with applications in security, mobile robotics, energy management, wearable devices, web services, molecular computation, nanotechnology, and biology. A number of widely used verification tools have resulted from our research, including FDR (model checker), CBMC (bounded model checker for C) and PRISM (probabilistic model checker). The theme has recently spun out a company, DiffBlue, that aims to automate coding tasks such as testing and bug fixing.

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Activities

Concurrency Oxford has long been one of the main centres of concurrency research....

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Software Model Checking Manual inspection of complex software is error-prone and costly, and ...

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Hardware Verification The arrival of Melham in 2002, followed by Ouaknine in 2004, greatly ...

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PRISM PRISM is a probabilistic model checker, a tool for formal modelling a...

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PRISM PRISM is a probabilistic model checker, a tool for formal modelling a...

Read more about PRISM

Quantitative Analysis and Verification Quantitative Analysis and Verification forms part of the Verification...

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Projects

Reasoning about control To reason about linear systems expressed as block diagrams that give a graphical represen...

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Publications

A Survey of Automated Techniques for Formal Software Verification

Read more about A Survey of Automated Techniques for Formal Software Verification

Scoot: A Tool for the Analysis of SystemC Models

Read more about Scoot: A Tool for the Analysis of SystemC Models

Decision Procedures – an Algorithmic Point of View

Read more about Decision Procedures – an Algorithmic Point of View

Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog

Read more about Word Level Predicate Abstraction and Refinement for Verifying RTL Verilog

Deciding Bit−Vector Arithmetic with Abstraction

Read more about Deciding Bit−Vector Arithmetic with Abstraction

Verification of Boolean Programs with Unbounded Thread Creation

Read more about Verification of Boolean Programs with Unbounded Thread Creation

VCEGAR: Verilog CounterExample Guided Abstraction Refinement

Read more about VCEGAR: Verilog CounterExample Guided Abstraction Refinement

Accurate Theorem Proving for Program Verification

Read more about Accurate Theorem Proving for Program Verification

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