elect the instruction sequence that will add 4 5 times using a loop struct Choice 1: mov ax, 0 mov cx, 5 L1: add ax, 4 loop L1 hoice 2: mov ax,5, mov cx, 0 L1: add cx, 4 loop L1

ASSEMBLY The ROR instruction is only suitable for signed integers. True False

Category: CPU Wiring Look at the following (incomplete) diagram of the Hack CPU taken from figure 5.9 of the textbook. ALU output outM instruction AM inM writeM A addressM inc reset PC po Match the wires A, B, C, D and E with the logic expression that describes the signal they should carry. The logic expressions use the operators not (!), and (&&) and or (I). The 16 wire instruction is named instr. The A and C instruction formats are: A-instruction: 0 V. V. V C-instruction: 1 1 1 a c1 c2 c3 c5 c6 d1 d2 d3 j1 j2 j3 Mire number: 15 14 13 12 11 10 9 8 6. 4 3 1 instr[15) && instr[3] B. instr[14] ALU

The CMP instruction is used to compare 2 operands. You can use a jump instruction afterwards. True or False

What is the operand for pep/8 instruction LDA 0x01AB, s ? Question 3 options: A. MEM[SP+01AB] B. SP+01AB C. MEM[01AB] D. X + 01AB E. MEM[ X + 01AB]

The following instruction is executed. Assume that before execution, register R15 contains 0x18, and the flags are ZF=0, SF=1, and CF=1. Ox indicates hexadecimal; do not include a 0x with your answer. Instruction: CMP R15, 0x21 After execution, register R15 contains (in Hex) and the flags will be ZF= SF= and CF=

Question 6 The MIPS instruction that performs $t3 = $t2 - 44 is addi St2,$t3,-44 B addi St3,St2,-44 subi St2,St3,44 D None E) addi St3,St2,44

start X 0 a, X push(X) A, X pop 1 b, x pop

write instruction sequence to implement: 4-byte number in data memory locations 0x15~0x12 divided by 16, and lowest byte is stored at 0x12

Convert the given machine code to 6809 instruction: AZ 2F O STA $F, Y O STX $BF, X None of the other options STD $EF O STY $EFDD

Select the instruction sequence that will divide -276 by 10 and store the result in a 16-bit variable res1. mov ax,-276 cwd mov bx,10 div bx mov res1, ax mov ax,-276 cwd mov bx,10 idiv bx mov res1, ax mov ax,10 mov bx,276 div bx mov res1,ax