Design a circuit diagram for the following comparator system that takes three 3-bit binary numbers [A, B and C] as inputs and outputs in the following fashion: Output=1; if A-4=2B-2 Output=0; otherwise NB1: You need to show a gate level diagram for the comparator, meaning you cannot use block diagram of magnitude comparator. However, you may use block diagrams of any other ICs you require. NB2: Drawing the circuit diagram horizontally in your script may help you. NB3: You cannot change the equation. You must draw the circuit for the given equation.

Inpo AND OR Inp1 AND AND Inp2 AND OR Inp3 AND OR Inp4 AND OR Inp5 AND AND Inp6 Assuming that a "NOT" operation is free (zero delay) and that a 2-input gate has a propagation delay of 65 ps and a contamination delay of 25 ps, calculate the propagation delay of the device above. Enter a number (how many ps) in the box below as your answer.

The output expression for an AND-OR-Invert circuit having one AND gate with inputs A,B,C, and D and one AND gate with inputs E and F is

2. Latch/FF/register design. (a) Design a SR-latch with enable using a D-latch and gates. (b) Design a D-latch using an SR-latch and gates.