Database System Concepts
Database System Concepts
7th Edition
ISBN: 9780078022159
Author: Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher: McGraw-Hill Education
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Consider the following string of memory accesses. All of these access will miss, thus the hit rate will be zero.

li t0, 0x1000

sw t1, 0(t0) # 1
sw t1, 0x10(t0) # 2
sw t1, 0x20(t0) # 3
sw t1, 0x30(t0) # 4
sw t1, 0x40(t0) # 5

What is the smallest offset greater than 0x10 that you can change #3 to that creates a conflict miss (specifically, evicting the data that was placed in the cache by instruction #2) in a 32-entry 4-word direct-mapped cache? Answer with the leading "0x".

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