A sequential logic circuit's outputs are dependent on both the inputs and the previous output. O a. Ob The only input is the clock signal. Previous experience with OC inputs. The sole data source is Od

Digital logic design Solve it with drawing and simulation lab I need them both to have the full solution. And thanks Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder.

1. Design a combinational logic circuit with three inputs A, B and C and one output X. When only one input is 1, output is 1. When none of input is 1, output is also 1. Otherwise, output is 0.

2. Explain which of the following instructions are invalid? State the invalidation reason and give the correct form for invalid instructions: a. MOV DL,AX b. MOV ES,CX c. MOV [BX],[2000] d. MOV BX,[AX] e. MOV CL,[BL+200] f. MOV 1234,DX g. MOV CH,[BX+SI+300] h. MOV DS,[SI+DI-5] i. MOV [4500],1234 j. MOV 200,[300]

What logic function is performed by this circuit? VDD a. O d. e. A b. None OC AB AB A+B A+B O f. B AB M1 M2 M3 M4 F M5