LLVM: include/llvm/CodeGen/MachineMemOperand.h Source File

LLVM 22.0.0git
MachineMemOperand.h
Go to the documentation of this file.
1//==- llvm/CodeGen/MachineMemOperand.h - MachineMemOperand class -*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the declaration of the MachineMemOperand class, which is a
10// description of a memory reference. It is used to help track dependencies
11// in the backend.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H
16#define LLVM_CODEGEN_MACHINEMEMOPERAND_H
17
18#include "llvm/ADT/BitmaskEnum.h"
19#include "llvm/ADT/PointerUnion.h"
20#include "llvm/Analysis/MemoryLocation.h"
21#include "llvm/CodeGen/PseudoSourceValue.h"
22#include "llvm/CodeGenTypes/LowLevelType.h"
23#include "llvm/IR/DerivedTypes.h"
24#include "llvm/IR/LLVMContext.h"
25#include "llvm/IR/Metadata.h"
26#include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*>
27#include "llvm/Support/AtomicOrdering.h"
28#include "llvm/Support/Compiler.h"
29#include "llvm/Support/DataTypes.h"
30
31namespace llvm {
32
33class MDNode;
34class raw_ostream;
35class MachineFunction;
36class ModuleSlotTracker;
37class TargetInstrInfo;
38
39/// This class contains a discriminated union of information about pointers in
40/// memory operands, relating them back to LLVM IR or to virtual locations (such
41/// as frame indices) that are exposed during codegen.
43 /// This is the IR pointer value for the access, or it is null if unknown.
45
46 /// Offset - This is an offset from the base Value*.
47 int64_t Offset;
48
49 unsigned AddrSpace = 0;
50
52
53 explicit MachinePointerInfo(const Value *v, int64_t offset = 0,
54 uint8_t ID = 0)
55 : V(v), Offset(offset), StackID(ID) {
56 AddrSpace = v ? v->getType()->getPointerAddressSpace() : 0;
57 }
58
59 explicit MachinePointerInfo(const PseudoSourceValue *v, int64_t offset = 0,
60 uint8_t ID = 0)
61 : V(v), Offset(offset), StackID(ID) {
62 AddrSpace = v ? v->getAddressSpace() : 0;
63 }
64
65 explicit MachinePointerInfo(unsigned AddressSpace = 0, int64_t offset = 0)
66 : V((const Value *)nullptr), Offset(offset), AddrSpace(AddressSpace),
67 StackID(0) {}
68
71 int64_t offset = 0,
72 uint8_t ID = 0)
73 : V(v), Offset(offset), StackID(ID) {
74 if (V) {
75 if (const auto *ValPtr = dyn_cast_if_present<const Value *>(V))
76 AddrSpace = ValPtr->getType()->getPointerAddressSpace();
77 else
78 AddrSpace = cast<const PseudoSourceValue *>(V)->getAddressSpace();
79 }
80 }
81
90
91 /// Return true if memory region [V, V+Offset+Size) is known to be
92 /// dereferenceable.
94 const DataLayout &DL) const;
95
96 /// Return the LLVM IR address space number that this pointer points into.
97 LLVM_ABI unsigned getAddrSpace() const;
98
99 /// Return a MachinePointerInfo record that refers to the constant pool.
101
102 /// Return a MachinePointerInfo record that refers to the specified
103 /// FrameIndex.
105 int64_t Offset = 0);
106
107 /// Return a MachinePointerInfo record that refers to a jump table entry.
109
110 /// Return a MachinePointerInfo record that refers to a GOT entry.
112
113 /// Stack pointer relative access.
115 int64_t Offset, uint8_t ID = 0);
116
117 /// Stack memory without other information.
119};
120
121
122//===----------------------------------------------------------------------===//
123/// A description of a memory reference used in the backend.
124/// Instead of holding a StoreInst or LoadInst, this class holds the address
125/// Value of the reference along with a byte size and offset. This allows it
126/// to describe lowered loads and stores. Also, the special PseudoSourceValue
127/// objects can be used to represent loads and stores to memory locations
128/// that aren't explicit in the regular LLVM IR.
129///
131public:
132 /// Flags values. These may be or'd together.
134 // No flags set.
136 /// The memory access reads data.
137 MOLoad = 1u << 0,
138 /// The memory access writes data.
139 MOStore = 1u << 1,
140 /// The memory access is volatile.
141 MOVolatile = 1u << 2,
142 /// The memory access is non-temporal.
143 MONonTemporal = 1u << 3,
144 /// The memory access is dereferenceable (i.e., doesn't trap).
146 /// The memory access always returns the same value (or traps).
147 MOInvariant = 1u << 5,
148
149 // Reserved for use by target-specific passes.
150 // Targets may override getSerializableMachineMemOperandTargetFlags() to
151 // enable MIR serialization/parsing of these flags. If more of these flags
152 // are added, the MIR printing/parsing code will need to be updated as well.
153 MOTargetFlag1 = 1u << 6,
154 MOTargetFlag2 = 1u << 7,
155 MOTargetFlag3 = 1u << 8,
156 MOTargetFlag4 = 1u << 9,
157
158 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ MOTargetFlag4)
159 };
160
161private:
162 /// Atomic information for this memory operation.
163 struct MachineAtomicInfo {
164 /// Synchronization scope ID for this memory operation.
165 unsigned SSID : 8; // SyncScope::ID
166 /// Atomic ordering requirements for this memory operation. For cmpxchg
167 /// atomic operations, atomic ordering requirements when store occurs.
168 unsigned Ordering : 4; // enum AtomicOrdering
169 /// For cmpxchg atomic operations, atomic ordering requirements when store
170 /// does not occur.
171 unsigned FailureOrdering : 4; // enum AtomicOrdering
172 };
173
174 MachinePointerInfo PtrInfo;
175
176 /// Track the memory type of the access. An access size which is unknown or
177 /// too large to be represented by LLT should use the invalid LLT.
178 LLT MemoryType;
179
180 Flags FlagVals;
181 Align BaseAlign;
182 MachineAtomicInfo AtomicInfo;
183 AAMDNodes AAInfo;
184 const MDNode *Ranges;
185
186public:
187 /// Construct a MachineMemOperand object with the specified PtrInfo, flags,
188 /// size, and base alignment. For atomic operations the synchronization scope
189 /// and atomic ordering requirements must also be specified. For cmpxchg
190 /// atomic operations the atomic ordering requirements when store does not
191 /// occur must also be specified.
192 LLVM_ABI
193 MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, LocationSize TS,
194 Align a, const AAMDNodes &AAInfo = AAMDNodes(),
195 const MDNode *Ranges = nullptr,
197 AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
198 AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
199 LLVM_ABI
200 MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, LLT type, Align a,
201 const AAMDNodes &AAInfo = AAMDNodes(),
202 const MDNode *Ranges = nullptr,
204 AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
205 AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
206
207 const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
208
209 /// Return the base address of the memory access. This may either be a normal
210 /// LLVM IR Value, or one of the special values used in CodeGen.
211 /// Special values are those obtained via
212 /// PseudoSourceValue::getFixedStack(int), PseudoSourceValue::getStack, and
213 /// other PseudoSourceValue member functions which return objects which stand
214 /// for frame/stack pointer relative references and other special references
215 /// which are not representable in the high-level IR.
216 const Value *getValue() const {
217 return dyn_cast_if_present<const Value *>(PtrInfo.V);
218 }
219
223
224 const void *getOpaqueValue() const { return PtrInfo.V.getOpaqueValue(); }
225
226 /// Return the raw flags of the source value, \see Flags.
227 Flags getFlags() const { return FlagVals; }
228
229 /// Bitwise OR the current flags with the given flags.
230 void setFlags(Flags f) { FlagVals |= f; }
231
232 /// For normal values, this is a byte offset added to the base address.
233 /// For PseudoSourceValue::FPRel values, this is the FrameIndex number.
234 int64_t getOffset() const { return PtrInfo.Offset; }
235
236 unsigned getAddrSpace() const { return PtrInfo.getAddrSpace(); }
237
238 /// Return the memory type of the memory reference. This should only be relied
239 /// on for GlobalISel G_* operation legalization.
240 LLT getMemoryType() const { return MemoryType; }
241
242 /// Return the size in bytes of the memory reference.
244 return MemoryType.isValid()
245 ? LocationSize::precise(MemoryType.getSizeInBytes())
247 }
248
249 /// Return the size in bits of the memory reference.
251 return MemoryType.isValid()
252 ? LocationSize::precise(MemoryType.getSizeInBits())
254 }
255
256 LLT getType() const {
257 return MemoryType;
258 }
259
260 /// Return the minimum known alignment in bytes of the actual memory
261 /// reference.
262 LLVM_ABI Align getAlign() const;
263
264 /// Return the minimum known alignment in bytes of the base address, without
265 /// the offset.
266 Align getBaseAlign() const { return BaseAlign; }
267
268 /// Return the AA tags for the memory reference.
269 AAMDNodes getAAInfo() const { return AAInfo; }
270
271 /// Return the range tag for the memory reference.
272 const MDNode *getRanges() const { return Ranges; }
273
274 /// Returns the synchronization scope ID for this memory operation.
276 return static_cast<SyncScope::ID >(AtomicInfo.SSID);
277 }
278
279 /// Return the atomic ordering requirements for this memory operation. For
280 /// cmpxchg atomic operations, return the atomic ordering requirements when
281 /// store occurs.
283 return static_cast<AtomicOrdering >(AtomicInfo.Ordering);
284 }
285
286 /// For cmpxchg atomic operations, return the atomic ordering requirements
287 /// when store does not occur.
289 return static_cast<AtomicOrdering >(AtomicInfo.FailureOrdering);
290 }
291
292 /// Return a single atomic ordering that is at least as strong as both the
293 /// success and failure orderings for an atomic operation. (For operations
294 /// other than cmpxchg, this is equivalent to getSuccessOrdering().)
298
299 bool isLoad() const { return FlagVals & MOLoad; }
300 bool isStore() const { return FlagVals & MOStore; }
301 bool isVolatile() const { return FlagVals & MOVolatile; }
302 bool isNonTemporal() const { return FlagVals & MONonTemporal; }
303 bool isDereferenceable() const { return FlagVals & MODereferenceable; }
304 bool isInvariant() const { return FlagVals & MOInvariant; }
305
306 /// Returns true if this operation has an atomic ordering requirement of
307 /// unordered or higher, false otherwise.
308 bool isAtomic() const {
310 }
311
312 /// Returns true if this memory operation doesn't have any ordering
313 /// constraints other than normal aliasing. Volatile and (ordered) atomic
314 /// memory operations can't be reordered.
320
321 /// Update this MachineMemOperand to reflect the alignment of MMO, if it has a
322 /// greater alignment. This must only be used when the new alignment applies
323 /// to all users of this MachineMemOperand.
325
326 /// Change the SourceValue for this MachineMemOperand. This should only be
327 /// used when an object is being relocated and all references to it are being
328 /// updated.
329 void setValue(const Value *NewSV) { PtrInfo.V = NewSV; }
330 void setValue(const PseudoSourceValue *NewSV) { PtrInfo.V = NewSV; }
331 void setOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
332
333 /// Reset the tracked memory type.
334 void setType(LLT NewTy) {
335 MemoryType = NewTy;
336 }
337
338 /// Unset the tracked range metadata.
339 void clearRanges() { Ranges = nullptr; }
340
341 /// Support for operator<<.
342 /// @{
345 const LLVMContext &Context, const MachineFrameInfo *MFI,
346 const TargetInstrInfo *TII) const;
347 /// @}
348
349 friend bool operator==(const MachineMemOperand &LHS,
350 const MachineMemOperand &RHS) {
351 return LHS.getValue() == RHS.getValue() &&
352 LHS.getPseudoValue() == RHS.getPseudoValue() &&
353 LHS.getSize() == RHS.getSize() &&
354 LHS.getOffset() == RHS.getOffset() &&
355 LHS.getFlags() == RHS.getFlags() &&
356 LHS.getAAInfo() == RHS.getAAInfo() &&
357 LHS.getRanges() == RHS.getRanges() &&
358 LHS.getAlign() == RHS.getAlign() &&
359 LHS.getAddrSpace() == RHS.getAddrSpace();
360 }
361
362 friend bool operator!=(const MachineMemOperand &LHS,
363 const MachineMemOperand &RHS) {
364 return !(LHS == RHS);
365 }
366};
367
368} // End llvm namespace
369
370#endif
aarch64 promote const
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
#define LLVM_ABI
Definition Compiler.h:213
const HexagonInstrInfo * TII
Implement a low-level type suitable for MachineInstr level instruction selection.
This file provides utility analysis objects describing memory locations.
This file contains the declarations for metadata subclasses.
This file defines the PointerUnion class, which is a discriminated union of pointer types.
Value * RHS
Value * LHS
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:63
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
static LocationSize precise(uint64_t Value)
static constexpr LocationSize beforeOrAfterPointer()
Any location before or after the base pointer (but still within the underlying object).
Metadata node.
Definition Metadata.h:1078
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
A description of a memory reference used in the backend.
void setType(LLT NewTy)
Reset the tracked memory type.
LocationSize getSize() const
Return the size in bytes of the memory reference.
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur.
const PseudoSourceValue * getPseudoValue() const
LLT getMemoryType() const
Return the memory type of the memory reference.
unsigned getAddrSpace() const
void clearRanges()
Unset the tracked range metadata.
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
bool isUnordered() const
Returns true if this memory operation doesn't have any ordering constraints other than normal aliasin...
const MDNode * getRanges() const
Return the range tag for the memory reference.
void setValue(const Value *NewSV)
Change the SourceValue for this MachineMemOperand.
bool isAtomic() const
Returns true if this operation has an atomic ordering requirement of unordered or higher,...
LLVM_ABI void refineAlignment(const MachineMemOperand *MMO)
Update this MachineMemOperand to reflect the alignment of MMO, if it has a greater alignment.
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
const void * getOpaqueValue() const
friend bool operator!=(const MachineMemOperand &LHS, const MachineMemOperand &RHS)
LLVM_ABI MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, LocationSize TS, Align a, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
Construct a MachineMemOperand object with the specified PtrInfo, flags, size, and base alignment.
AtomicOrdering getMergedOrdering() const
Return a single atomic ordering that is at least as strong as both the success and failure orderings ...
void setOffset(int64_t NewOffset)
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
AtomicOrdering getSuccessOrdering() const
Return the atomic ordering requirements for this memory operation.
void setFlags(Flags f)
Bitwise OR the current flags with the given flags.
const MachinePointerInfo & getPointerInfo() const
Flags getFlags() const
Return the raw flags of the source value,.
LLVM_ABI Align getAlign() const
Return the minimum known alignment in bytes of the actual memory reference.
LocationSize getSizeInBits() const
Return the size in bits of the memory reference.
friend bool operator==(const MachineMemOperand &LHS, const MachineMemOperand &RHS)
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
void setValue(const PseudoSourceValue *NewSV)
const Value * getValue() const
Return the base address of the memory access.
Align getBaseAlign() const
Return the minimum known alignment in bytes of the base address, without the offset.
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
Manage lifetime of a slot tracker for printing IR.
A discriminated union of two or more pointer types, with the discriminator in the low bit of the poin...
Definition PointerUnion.h:110
Special value supplied for machine level alias analysis.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition SmallVector.h:574
TargetInstrInfo - Interface to description of machine instruction set.
LLVM Value Representation.
Definition Value.h:75
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
@ System
Synchronized with respect to all concurrently executing threads.
Definition LLVMContext.h:58
This is an optimization pass for GlobalISel generic memory operations.
Definition AddressRanges.h:18
@ Offset
Definition DWP.cpp:477
unsigned getPointerAddressSpace(const Type *T)
Definition SPIRVUtils.h:345
auto dyn_cast_if_present(const Y &Val)
dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a null (or none in the case ...
Definition Casting.h:732
AtomicOrdering getMergedAtomicOrdering(AtomicOrdering AO, AtomicOrdering Other)
Return a single atomic ordering that is at least as strong as both the AO and Other orderings for an ...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
AtomicOrdering
Atomic ordering for LLVM's memory model.
@ LLVM_MARK_AS_BITMASK_ENUM
Definition ModRef.h:37
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition Metadata.h:761
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
This class contains a discriminated union of information about pointers in memory operands,...
static LLVM_ABI MachinePointerInfo getJumpTable(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a jump table entry.
LLVM_ABI bool isDereferenceable(unsigned Size, LLVMContext &C, const DataLayout &DL) const
Return true if memory region [V, V+Offset+Size) is known to be dereferenceable.
MachinePointerInfo(const PseudoSourceValue *v, int64_t offset=0, uint8_t ID=0)
LLVM_ABI unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
static LLVM_ABI MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset, uint8_t ID=0)
Stack pointer relative access.
MachinePointerInfo(unsigned AddressSpace=0, int64_t offset=0)
int64_t Offset
Offset - This is an offset from the base Value*.
MachinePointerInfo(PointerUnion< const Value *, const PseudoSourceValue * > v, int64_t offset=0, uint8_t ID=0)
PointerUnion< const Value *, const PseudoSourceValue * > V
This is the IR pointer value for the access, or it is null if unknown.
static LLVM_ABI MachinePointerInfo getConstantPool(MachineFunction &MF)
Return a MachinePointerInfo record that refers to the constant pool.
MachinePointerInfo getWithOffset(int64_t O) const
static LLVM_ABI MachinePointerInfo getUnknownStack(MachineFunction &MF)
Stack memory without other information.
static LLVM_ABI MachinePointerInfo getGOT(MachineFunction &MF)
Return a MachinePointerInfo record that refers to a GOT entry.
MachinePointerInfo(const Value *v, int64_t offset=0, uint8_t ID=0)
static LLVM_ABI MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
Generated on for LLVM by doxygen 1.14.0

AltStyle によって変換されたページ (->オリジナル) /