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Commit dabb227

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Fix ret
1 parent c58755d commit dabb227

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2 files changed

+18
-3
lines changed

2 files changed

+18
-3
lines changed

‎src/Data/BitCode/LLVM/FromBitCode.hs‎

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -614,6 +614,22 @@ parseFunctionBlock = \case
614614
(B.USELIST, b) -> trace ("Cannot parse uselist yet (" ++ show b ++ ")") >> return ()
615615
_ -> pure ()
616616

617+
getVal :: (HasCallStack, Integral a) => a -> LLVMReader Symbol
618+
getVal n = do
619+
valueList <- askValueList
620+
let idx = fromIntegral n
621+
if idx < 0 || idx > length valueList
622+
then fail $ "index " ++ show idx ++ " out of range [0, " ++ show (length valueList) ++ ") of available values."
623+
else pure (valueList !! idx)
624+
625+
getVal' :: (HasCallStack, Integral a) => Ty -> a -> LLVMReader Symbol
626+
getVal' t n = do
627+
val <- getVal n
628+
if (ty val) == t
629+
then return val
630+
else do valueList <- askValueList
631+
fail $ show val ++ " (" ++ show (fromIntegral n) ++ ") doesn't have type " ++ show t
632+
617633
getRelativeVal :: (HasCallStack, Integral a) => [Symbol] -> a -> LLVMReader Symbol
618634
getRelativeVal refs n = do
619635
valueList <- askValueList
@@ -714,7 +730,7 @@ parseInst rs = \case
714730
where
715731
parseCase :: Ty -> [BC.Val] -> LLVMReader [(Symbol, BasicBlockId)]
716732
parseCase ty [] = pure []
717-
parseCase ty (valId:blockId:cases) = (:) <$> ((,blockId) <$> getRelativeValWithType ty rs valId) <*> parseCase ty cases
733+
parseCase ty (valId:blockId:cases) = (:) <$> ((,blockId) <$> getVal' ty valId) <*> parseCase ty cases
718734
-- 13
719735
-- (INST_INVOKE, vals)
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-- 14 - Unused

‎test/LLVMSpec.hs‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -229,8 +229,7 @@ spec_llvm = do
229229
bcfile <- compile "test/fromBitcode/switch.ll"
230230
ret <- readBitcode bcfile
231231
ret `shouldSatisfy` isModule
232-
let Right mod@(_,mod') = ret
233-
putStrLn . show $ pretty mod'
232+
let Right mod = ret
234233
writeFile' bcfile . map denormalize $ toBitCode mod
235234
ret <- readBitcode bcfile
236235
ret `shouldSatisfy` isModule

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