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Commit 4b9fc85

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DevVGA: Made bytewise access to VBE registers more robust.
svn:sync-xref-src-repo-rev: r171321
1 parent a622d38 commit 4b9fc85

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1 file changed

+34
-3
lines changed

1 file changed

+34
-3
lines changed

‎src/VBox/Devices/Graphics/DevVGA.cpp‎

Lines changed: 34 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
/* $Id: DevVGA.cpp 111491 2025-10-24 12:45:03Z michal.necasek@oracle.com $ */
1+
/* $Id: DevVGA.cpp 111728 2025-11-14 10:50:48Z michal.necasek@oracle.com $ */
22
/** @file
33
* DevVGA - VBox VGA/VESA device.
44
*/
@@ -3189,6 +3189,10 @@ vgaIoPortWriteVbeData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32
31893189
#ifdef VBE_BYTEWISE_IO
31903190
if (cb == 1)
31913191
{
3192+
// Any data register byte access clears index register flip-flops
3193+
pThis->fReadVBEIndex = false;
3194+
pThis->fWriteVBEIndex = false;
3195+
31923196
if (!pThis->fWriteVBEData)
31933197
{
31943198
if ( (pThis->vbe_index == VBE_DISPI_INDEX_ENABLE)
@@ -3204,7 +3208,9 @@ vgaIoPortWriteVbeData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32
32043208
}
32053209

32063210
u32 = (pThis->cbWriteVBEData << 8) | (u32 & 0xFF);
3211+
// Clear both read and write flip-flops
32073212
pThis->fWriteVBEData = false;
3213+
pThis->fReadVBEData = false;
32083214
cb = 2;
32093215
}
32103216
#endif
@@ -3227,12 +3233,18 @@ vgaIoPortWriteVbeIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint3
32273233
#ifdef VBE_BYTEWISE_IO
32283234
if (cb == 1)
32293235
{
3236+
// Any index register byte access clears data register flip-flops
3237+
pThis->fReadVBEData = false;
3238+
pThis->fWriteVBEData = false;
3239+
32303240
if (!pThis->fWriteVBEIndex)
32313241
{
32323242
pThis->cbWriteVBEIndex = u32 & 0x00FF;
32333243
pThis->fWriteVBEIndex = true;
32343244
return VINF_SUCCESS;
32353245
}
3246+
// Clear both read and write flip-flops
3247+
pThis->fReadVBEIndex = false;
32363248
pThis->fWriteVBEIndex = false;
32373249
vbe_ioport_write_index(pThis, offPort, (pThis->cbWriteVBEIndex << 8) | (u32 & 0x00FF));
32383250
return VINF_SUCCESS;
@@ -3259,14 +3271,20 @@ vgaIoPortReadVbeData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_
32593271
#ifdef VBE_BYTEWISE_IO
32603272
if (cb == 1)
32613273
{
3274+
// Any data register byte access clears index register flip-flops
3275+
pThis->fReadVBEIndex = false;
3276+
pThis->fWriteVBEIndex = false;
3277+
32623278
if (!pThis->fReadVBEData)
32633279
{
32643280
*pu32 = (vbe_ioport_read_data(pThis, offPort) >> 8) & 0xFF;
32653281
pThis->fReadVBEData = true;
32663282
return VINF_SUCCESS;
32673283
}
32683284
*pu32 = vbe_ioport_read_data(pThis, offPort) & 0xFF;
3269-
pThis->fReadVBEData = false;
3285+
// Clear both read and write flip-flops
3286+
pThis->fWriteVBEData = false;
3287+
pThis->fReadVBEData = false;
32703288
return VINF_SUCCESS;
32713289
}
32723290
#endif
@@ -3301,14 +3319,20 @@ vgaIoPortReadVbeIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32
33013319
#ifdef VBE_BYTEWISE_IO
33023320
if (cb == 1)
33033321
{
3322+
// Any index register byte access clears data register flip-flops
3323+
pThis->fReadVBEData = false;
3324+
pThis->fWriteVBEData = false;
3325+
33043326
if (!pThis->fReadVBEIndex)
33053327
{
33063328
*pu32 = (vbe_ioport_read_index(pThis, offPort) >> 8) & 0xFF;
33073329
pThis->fReadVBEIndex = true;
33083330
return VINF_SUCCESS;
33093331
}
33103332
*pu32 = vbe_ioport_read_index(pThis, offPort) & 0xFF;
3311-
pThis->fReadVBEIndex = false;
3333+
// Clear both read and write flip-flops
3334+
pThis->fReadVBEIndex = false;
3335+
pThis->fWriteVBEIndex = false;
33123336
return VINF_SUCCESS;
33133337
}
33143338
#endif
@@ -4736,6 +4760,7 @@ static DECLCALLBACK(void) vgaR3InfoVBE(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, c
47364760
NOREF(pszArgs);
47374761

47384762
pHlp->pfnPrintf(pHlp, "LFB at %RGp\n", pThis->GCPhysVRAM);
4763+
pHlp->pfnPrintf(pHlp, "VBE index register: 0x%04x\n", pThis->vbe_index);
47394764
if (!(pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED))
47404765
pHlp->pfnPrintf(pHlp, "VBE disabled\n");
47414766
else
@@ -4753,6 +4778,12 @@ static DECLCALLBACK(void) vgaR3InfoVBE(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, c
47534778
pHlp->pfnPrintf(pHlp, " Selected bank: 0x%04x\n", pThis->vbe_regs[VBE_DISPI_INDEX_BANK]);
47544779
pHlp->pfnPrintf(pHlp, " DAC: %d-bit\n", pThis->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_8BIT_DAC ? 8 : 6);
47554780
}
4781+
#ifdef VBE_BYTEWISE_IO
4782+
if (pThis->fReadVBEIndex || pThis->fWriteVBEIndex)
4783+
pHlp->pfnPrintf(pHlp, "VBE index flip-flops: read=%d, write=%d\n", pThis->fReadVBEIndex, pThis->fWriteVBEIndex);
4784+
if (pThis->fReadVBEData || pThis->fWriteVBEData)
4785+
pHlp->pfnPrintf(pHlp, "VBE data flip-flops: read=%d, write=%d\n", pThis->fReadVBEData, pThis->fWriteVBEData);
4786+
#endif
47564787
}
47574788

47584789

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