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Commit ce89b28

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Finite State Machines solved
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‎3-Circuits-Sequential Logic/14-Finite State Machines/131-Lemmings4.v‎

Lines changed: 42 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -11,56 +11,70 @@ module top_module(
1111
output digging );
1212

1313
//-------------Internal Constants-----------------
14-
// F > D > W Switch, States : FallLeft, FallRight, DigLeft, DigRight, WalkLeft, WalkRight
15-
parameter SPLAT=0, FL=1, FR=2, DL=3, DR=4, WL=5, WR=6;
16-
integer count =0;
14+
// F > D > W Switch
15+
parameter SPLAT0=0, SPLAT1=1, FL=2, FR=3, DL=4, DR=5, WL=6, WR=7; // States
16+
1717
//-------------Internal Variables-----------------
18-
reg [2:0] state, next_state; //used Binary encoding, 3 state bits required for 7 states.
19-
18+
reg [3:0] state, next_state; //used Binary encoding, 4 state bits required.
19+
// Counter for tracking the number of clock cycles in FL state
20+
reg [4:0] flr_counter; // For max 21 cycles
21+
22+
2023
// State transition logic - Combinational Logic
2124
always @(*) begin
2225
case(state)
23-
WL : next_state = ground ? (dig ? DL : (bump_left ? WR : WL)) : FL ;
24-
//FL : next_state = ground ? WL : FL;
25-
FL : begin
26-
if(count > 22)
27-
next_state = SPLAT;
28-
else if(ground || ~(state == SPLAT) )begin
29-
//count = 0;
30-
next_state = WL;
31-
end
32-
else begin
26+
WL : begin
27+
if (ground)
28+
next_state = (dig ? DL : (bump_left ? WR : WL)) ;
29+
else
3330
next_state = FL;
34-
end
31+
end
32+
FL : begin
33+
if (flr_counter >= 20 )
34+
next_state = ground ? SPLAT0 : SPLAT1 ;
35+
else
36+
next_state = ground ? WL : FL;
3537
end
3638
DL : next_state = ground ? DL : FL;
37-
WR : next_state = ground ? (dig ? DR : (bump_right ? WL : WR)) : FR;
38-
FR : next_state = ground ? WR : FR;
39+
WR : begin
40+
if (ground)
41+
next_state = dig ? DR : (bump_right ? WL : WR) ;
42+
else
43+
next_state = FR;
44+
end
45+
FR :begin
46+
if (flr_counter >= 20 )
47+
next_state = ground ? SPLAT0 : SPLAT1 ;
48+
else
49+
next_state = ground ? WR : FR;
50+
end
3951
DR : next_state = ground ? DR : FR;
40-
SPLAT : next_state = SPLAT;
41-
default : next_state = 3'bxxx;
52+
SPLAT0: next_state = SPLAT0 ;
53+
SPLAT1: next_state = ground ? SPLAT0 : SPLAT1 ;
54+
// default : next_state = SPLAT;
4255
endcase
4356
end
4457

4558
// Current state logic - Sequential Logic
4659
always @(posedge clk, posedge areset) begin
4760
// asynchronous reset
48-
if(areset)
61+
if(areset)begin
4962
state <= WL;
50-
else if (state == FL ) begin
51-
count <= count + 1;
52-
state <= next_state;
63+
flr_counter <= 0;
5364
end
5465
else begin
55-
count = 0;
5666
state <= next_state;
67+
if (state == FL || state == FR)
68+
flr_counter <= flr_counter + 1;
69+
else
70+
flr_counter <= 0;
5771
end
5872
end
59-
73+
6074
// Output logic - Combinational output logic
61-
assign aaah = (state == FL || state == FR); // Go aaah when Fall left or Fall right
75+
assign aaah = (state == FL || state == FR|| state == SPLAT1) ;
6276
assign digging = (state == DL || state == DR);
6377
assign walk_left = (state == WL );
64-
assign walk_right = (state == WR );
78+
assign walk_right = (state == WR );
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6680
endmodule

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