Hello Everyone!
I have an issue with dsi1 screen. When I'm connecting FFC15 pin i have voltage drift at 5V and 3.3V, before I was supplying logic of screen via 3.3V form CM4, now its directly from PS. Screen taking about 35mA so i don't thing that is because lack of power. when FFC is supplied I'm getting that drift at 5V. Moreover display is fine, it works with Pi 3b+,4 with no clue. Maybe its design issue, but I don't see anything wrong. Please take a look of the design. Thank You in advance for support
Regards

isn't the FFC single sided only :?:

What type of display screen?
Does the display have a 5V power supply connection?
Does the display work with the CM4, or did it work before you changed the 3.3V supply?

aBUGSworstnightmare wrote:isn't the FFC single sided only :?:

nope :-( both sides are common, it is vertical socket



What type of display screen? - It is Waveshare 7inch touch display 800x480 DSI
Does the display have a 5V power supply connection? - Yes it have
Does the display work with the CM4, or did it work before you changed the 3.3V supply? - CM4 is working correctly with Waveshare CM4-IO-BOARD-B, 5V for display going from pin 2 and 3 GPIO 40 pin header, 3.3V from built in carrier board step-down converter is also fine in Waveshare carrier board. In this Waveshare carrier board 3.3V for display are separated from CM4 3.3V. That is reason why i cut out trace from my custom carrier board to separate 3.3V specially for display for test. At DSI1_DX_N/P pins and Clock there is something about 1.2V but my entry level oscilloscope couldn't get it correctly, touch was recognized when supplied 3.3V from CM4, but on separate supply it was scanning very long time, probably because SCL and SDA is not pulled up in this case to GPIO_VREF.

Your DSI routing seems to not meet the requirements.

1. Intra-differential lengh difference: < 0.15mm
2. Length difference between any two differential pairs: < 1mm
3. Have you calculated the single ended (50Ω) and differential (90...100Ω) impedance? All valies ±10Ω. Multilayer board required! You can use Saturn PCB Toolkit for calculation.
https://saturnpcb.com/saturn-pcb-toolkit/
4. Spacing between differential pairs at least 3 times the spacing between + and - of the differential pair.

Read this:
https://www.renesas.com/en/document/apn ... -and-usb20
(says Renesas, but is vendor independent)

fchk wrote:Your DSI routing seems to not meet the requirements.

Looks like it completely miss the requirements. :-|
Yes that is 4 layers pcb with 100Ω impedance. Ethernet 1Gb/s is working ;-)

Just intra-diff pair are matching length difference but now it meaningless in light of this document.
I guess that i have to take into account also length differences by CM4 side of DSI, correct?
Thank You for Your invaluable help.

Length matching won't stop it working ( you have to be significantly off for It not to work say 10cm)It may increase the chances of it not being compliant with emission standards.

This might be a wild goose chase -- but one possibility is that the power supply rails might be coming up in a different order? Maybe take a look at display's 5V, 3.3V, SDA, SCL at power up, with an oscilloscope, in both working and non-working cases, to see if they are different.

Waveshare might be able to advise you what is the correct sequence.