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//
// base.h
//
#ifndef _base_h
#define _base_h
.equ RPI_BASE, 0x107C000000UL
// GPIO
.equ ARM_GPIO2_BASE, RPI_BASE + 0x1517C00
.equ ARM_GPIO2_DATA0, ARM_GPIO2_BASE + 0x04
#endifthe pcie controller remaps things a lotIsmaelGarHerr wrote: ↑Tue Jun 03, 2025 1:55 pmBut according to RaspBerryPi RP1 peripherals. Base address starts at 0x40000000 where does the addresses used in the tutorial come from?
also, this address isnt even the RP1, thats the bcm2712 gpioIsmaelGarHerr wrote: ↑Tue Jun 03, 2025 1:55 pm.equ RPI_BASE, 0x107C000000UL
// GPIO
.equ ARM_GPIO2_BASE, RPI_BASE + 0x1517C00
So if that address corresponds to bcm2712_gpio peripheral, how does it manage to control raspberry's GPIO pins if they are supposed to be managed by the RP1? is somehow PCIe remapping data written to hats the bcm2712 gpio to the RP1? Sorry if my assumption is wrong btw as I mentioned im new at thiscleverca22 wrote: ↑Tue Jun 03, 2025 4:37 pmthe pcie controller remaps things a lotIsmaelGarHerr wrote: ↑Tue Jun 03, 2025 1:55 pmBut according to RaspBerryPi RP1 peripherals. Base address starts at 0x40000000 where does the addresses used in the tutorial come from?
you have to parse the device-tree and the ranges= entries to know how to properly remap it
also, this address isnt even the RP1, thats the bcm2712 gpioIsmaelGarHerr wrote: ↑Tue Jun 03, 2025 1:55 pm.equ RPI_BASE, 0x107C000000UL
// GPIO
.equ ARM_GPIO2_BASE, RPI_BASE + 0x1517C00
so your looking at the entirely wrong document
the onboard status led is tied to a bcm2712 gpioIsmaelGarHerr wrote: ↑Tue Jun 03, 2025 7:53 pmSo if that address corresponds to bcm2712_gpio peripheral, how does it manage to control raspberry's GPIO pins if they are supposed to be managed by the RP1?