1 /*
2 * Copyright (c) 2000, 2001, 2002 Fabrice Bellard
3 *
4 * This file is part of FFmpeg.
5 *
6 * FFmpeg is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * FFmpeg is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with FFmpeg; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #ifndef AVUTIL_CPU_H
22 #define AVUTIL_CPU_H
23
24 #include <stddef.h>
25
26 #define AV_CPU_FLAG_FORCE 0x80000000 /* force usage of selected flags (OR) */
27
28 /* lower 16 bits - CPU features */
29 #define AV_CPU_FLAG_MMX 0x0001 ///< standard MMX
30 #define AV_CPU_FLAG_MMXEXT 0x0002
///< SSE integer functions or AMD MMX ext
31 #define AV_CPU_FLAG_MMX2 0x0002
///< SSE integer functions or AMD MMX ext
32 #define AV_CPU_FLAG_3DNOW 0x0004
///< AMD 3DNOW
33 #define AV_CPU_FLAG_SSE 0x0008
///< SSE functions
34 #define AV_CPU_FLAG_SSE2 0x0010
///< PIV SSE2 functions
35 #define AV_CPU_FLAG_SSE2SLOW 0x40000000
///< SSE2 supported, but usually not faster
36 ///< than regular MMX/SSE (e.g. Core1)
37 #define AV_CPU_FLAG_3DNOWEXT 0x0020
///< AMD 3DNowExt
38 #define AV_CPU_FLAG_SSE3 0x0040
///< Prescott SSE3 functions
39 #define AV_CPU_FLAG_SSE3SLOW 0x20000000
///< SSE3 supported, but usually not faster
40 ///< than regular MMX/SSE (e.g. Core1)
41 #define AV_CPU_FLAG_SSSE3 0x0080
///< Conroe SSSE3 functions
42 #define AV_CPU_FLAG_SSSE3SLOW 0x4000000
///< SSSE3 supported, but usually not faster
43 #define AV_CPU_FLAG_ATOM 0x10000000
///< Atom processor, some SSSE3 instructions are slower
44 #define AV_CPU_FLAG_SSE4 0x0100
///< Penryn SSE4.1 functions
45 #define AV_CPU_FLAG_SSE42 0x0200
///< Nehalem SSE4.2 functions
46 #define AV_CPU_FLAG_AESNI 0x80000
///< Advanced Encryption Standard functions
47 #define AV_CPU_FLAG_AVX 0x4000
///< AVX functions: requires OS support even if YMM registers aren't used
48 #define AV_CPU_FLAG_AVXSLOW 0x8000000
///< AVX supported, but slow when using YMM registers (e.g. Bulldozer)
49 #define AV_CPU_FLAG_XOP 0x0400
///< Bulldozer XOP functions
50 #define AV_CPU_FLAG_FMA4 0x0800
///< Bulldozer FMA4 functions
51 #define AV_CPU_FLAG_CMOV 0x1000
///< supports cmov instruction
52 #define AV_CPU_FLAG_AVX2 0x8000
///< AVX2 functions: requires OS support even if YMM registers aren't used
53 #define AV_CPU_FLAG_FMA3 0x10000
///< Haswell FMA3 functions
54 #define AV_CPU_FLAG_BMI1 0x20000
///< Bit Manipulation Instruction Set 1
55 #define AV_CPU_FLAG_BMI2 0x40000
///< Bit Manipulation Instruction Set 2
56 #define AV_CPU_FLAG_AVX512 0x100000
///< AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used
57 #define AV_CPU_FLAG_AVX512ICL 0x200000
///< F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ
58 #define AV_CPU_FLAG_SLOW_GATHER 0x2000000
///< CPU has slow gathers.
59
60 #define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
61 #define AV_CPU_FLAG_VSX 0x0002
///< ISA 2.06
62 #define AV_CPU_FLAG_POWER8 0x0004
///< ISA 2.07
63
64 #define AV_CPU_FLAG_ARMV5TE (1 << 0)
65 #define AV_CPU_FLAG_ARMV6 (1 << 1)
66 #define AV_CPU_FLAG_ARMV6T2 (1 << 2)
67 #define AV_CPU_FLAG_VFP (1 << 3)
68 #define AV_CPU_FLAG_VFPV3 (1 << 4)
69 #define AV_CPU_FLAG_NEON (1 << 5)
70 #define AV_CPU_FLAG_ARMV8 (1 << 6)
71 #define AV_CPU_FLAG_VFP_VM (1 << 7) ///< VFPv2 vector mode, deprecated in ARMv7-A and unavailable in various CPUs implementations
72 #define AV_CPU_FLAG_DOTPROD (1 << 8)
73 #define AV_CPU_FLAG_I8MM (1 << 9)
74 #define AV_CPU_FLAG_SETEND (1 <<16)
75
76 #define AV_CPU_FLAG_MMI (1 << 0)
77 #define AV_CPU_FLAG_MSA (1 << 1)
78
79 //Loongarch SIMD extension.
80 #define AV_CPU_FLAG_LSX (1 << 0)
81 #define AV_CPU_FLAG_LASX (1 << 1)
82
83 // RISC-V extensions
84 #define AV_CPU_FLAG_RVI (1 << 0) ///< I (full GPR bank)
85 #define AV_CPU_FLAG_RVF (1 << 1)
///< F (single precision FP)
86 #define AV_CPU_FLAG_RVD (1 << 2)
///< D (double precision FP)
87 #define AV_CPU_FLAG_RVV_I32 (1 << 3)
///< Vectors of 8/16/32-bit int's */
88 #define AV_CPU_FLAG_RVV_F32 (1 << 4)
///< Vectors of float's */
89 #define AV_CPU_FLAG_RVV_I64 (1 << 5)
///< Vectors of 64-bit int's */
90 #define AV_CPU_FLAG_RVV_F64 (1 << 6)
///< Vectors of double's
91 #define AV_CPU_FLAG_RVB_BASIC (1 << 7)
///< Basic bit-manipulations
92 #define AV_CPU_FLAG_RVB_ADDR (1 << 8)
///< Address bit-manipulations
93
94 /**
95 * Return the flags which specify extensions supported by the CPU.
96 * The returned value is affected by av_force_cpu_flags() if that was used
97 * before. So av_get_cpu_flags() can easily be used in an application to
98 * detect the enabled cpu flags.
99 */
101
102 /**
103 * Disables cpu detection and forces the specified flags.
104 * -1 is a special case that disables forcing of specific flags.
105 */
107
108 /**
109 * Parse CPU caps from a string and update the given AV_CPU_* flags based on that.
110 *
111 * @return negative on error.
112 */
114
115 /**
116 * @return the number of logical CPU cores present.
117 */
119
120 /**
121 * Overrides cpu count detection and forces the specified count.
122 * Count < 1 disables forcing of specific count.
123 */
125
126 /**
127 * Get the maximum data alignment that may be required by FFmpeg.
128 *
129 * Note that this is affected by the build configuration and the CPU flags mask,
130 * so e.g. if the CPU supports AVX, but libavutil has been built with
131 * --disable-avx or the AV_CPU_FLAG_AVX flag has been disabled through
132 * av_set_cpu_flags_mask(), then this function will behave as if AVX is not
133 * present.
134 */
136
137 #endif /* AVUTIL_CPU_H */