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10 December 2025
- diff hist RISC-V 20:40 +14 Xose.vazquez talk contribs (→In development: use full name for Ventana)
- diff hist Vector processor 07:09 −70 Himalia talk contribs (The deleted text, "utilizing only the first bit of each element and ignoring other bits" is incorrect for RISC-V mask register layout. See 4.5. "Mask Register Layout" in the cited document.)