00001 /*************************************************************************** 00002 *cr 00003 *cr (C) Copyright 1995-2019 The Board of Trustees of the 00004 *cr University of Illinois 00005 *cr All Rights Reserved 00006 *cr 00007 ***************************************************************************/ 00008 /*************************************************************************** 00009 * RCS INFORMATION: 00010 * 00011 * $RCSfile: CUDAAccel.h,v $ 00012 * $Author: johns $ $Locker: $ $State: Exp $ 00013 * $Revision: 1.28 $ $Date: 2020年02月26日 04:22:39 $ 00014 * 00015 ***************************************************************************/ 00032 #ifndef CUDACCEL_H 00033 #define CUDACCEL_H 00034 00035 #include "WKFThreads.h" 00036 #include "CUDAWrapNVML.h" 00037 00038 typedef struct { 00039 int deviceid; 00040 char name[80]; 00041 int major; 00042 int minor; 00043 unsigned long membytes; 00044 int clockratekhz; 00045 int smcount; 00046 int integratedgpu; 00047 int asyncenginecount; 00048 int kernelexectimeoutenabled; 00049 int canmaphostmem; 00050 int computemode; 00051 int spdpfpperfratio; 00052 int pageablememaccess; 00053 int pageablememaccessuseshostpagetables; 00054 } cudadevprops; 00055 00057 class CUDAAccel { 00058 private: 00059 int cudaavail; 00060 int numdevices; 00061 int numphysdevices; 00062 00063 wrap_nvml_handle *nvmlh; 00064 00065 ResizeArray<cudadevprops> devprops; 00066 00067 wkf_threadpool_t *cudapool; 00068 00069 void devpool_init(void); 00070 void devpool_fini(void); 00071 00072 // convenience enum to match CUDA driver APIs 00073 enum { computeModeDefault=0, 00074 computeModeExclusive=1, 00075 computeModeProhibited=2 }; // computeMode; 00076 00077 public: 00078 CUDAAccel(void); 00079 virtual ~CUDAAccel(void); 00080 00081 // functions for enumerating CUDA GPU accelerator devices 00082 // and their attributes 00083 void print_cuda_devices(void); 00084 int num_devices(void); 00085 int device_index(int dev); 00086 const char *device_name(int dev); 00087 int device_version_major(int dev); 00088 int device_version_minor(int dev); 00089 unsigned long device_membytes(int dev); 00090 float device_clock_ghz(int dev); 00091 int device_sm_count(int dev); 00092 int device_integratedgpu(int dev); 00093 int device_asyncenginecount(int dev); 00094 int device_kerneltimeoutenabled(int dev); 00095 int device_canmaphostmem(int dev); 00096 int device_computemode(int dev); 00097 int device_spdpfpperfratio(int dev); 00098 int device_pageablememaccess(int dev); 00099 int device_pageablememaccessuseshostpagetables(int dev); 00100 00101 // functions for operating on an open pool of CUDA devices 00102 int devpool_launch(void *fctn(void *), void *parms, int blocking); 00103 int devpool_wait(void); 00104 wkf_threadpool_t * get_cuda_devpool(void) { return cudapool; } 00105 00106 }; 00107 00108 #endif 00109 00110 00111