As you may not know im getting busier with school. Im in 8th grade and in a few months i have a big exam that dictates where i go to high school. So that is why sometimes i cant work on the kernel even tho i have free time im just very tired. I still think in lasm so programing in my head is not a big deal.
This update as you saw we added acpi directory and today i did the pipe line in lasm and tomorrow the stable version will be launched. Then i will start working on 1.2.6 cause MJ_jakk and Harry-Youth started working on adding some syscalls and improving the filesystem. As well as Robert Claus just launched DedOS 0.4 ... read more
After one of the biggest updates for Q1-kernel, comes 2-3 updates to add some syscalls, to edit the filesystem, to make some micro optimizations and to make it more stable.
Right now the focus for V1.2.5 is to add more syscalls and make the filesystem more stable.
I hope you will enjoy the new syscalls and faster filesystem.
Special thanks to:
MJ_jakk
Harry-Youth
| Metric (Lower is Better) | Linux (PREEMPT_RT) | FreeRTOS | seL4 | L4Re/Fiasco.OC | DragonFly BSD (Est.) | Q1-Kernel |
|---|---|---|---|---|---|---|
| 1. Inter-Process Communication (IPC) | 2.0 – 4.5 | 1.5 – 3.0 | 0.5 – 1.0 | 0.3 – 0.7 | 1.0 – 2.0 | 0.80 – 1.3 |
| 2. Process Context Switch | 1.5 – 3.0 | 1.0 – 2.5 | 0.8 – 1.8 | 0.7 – 1.4 | 1.5 – 3.0 | 1.5 – 2.0 |
| 3. Worst-Case Interrupt Latency (WCIL) | 10 – 50 | 5 – 15 | 5 – 20 | 10 – 30 | 5 – 15 | 20 – 30 |
| 4. Process Creation Time | 50 – 200 | N/A | 20 – 50 | 15 – 40 | 50 – 150 | 40 – 60 |
| 5. Syscall Overhead (Null Call) | 0.2 – 0.4 | N/A | 0.1 – 0.3 | 0.1 – 0.3 | 0.2 – 0.4 | 0.2 – 0.3 |
The latest nightly update of Q1-kernel has the final version of Q1-kernel. This version is still in beta but everything that is part of the main code is finished. The image compiles and boots with no errors.
We have internet support trough a VM that uses virtual ether.
We have 60 linux syscalls and 28 posix syscalls.
Libc on the new OS that will come out.
And the most important context switcher that is proofed in Isabella, but more like a theory proofed so nothing very very complex but still that means its safe fast and smaller, only needing at lowest 2kb cpu buffer/log on every "Node", but that means more resets of the buffer/log but still fast. And at max 256kb cpu buffer/log on every "Node".... read more
For the last couple of days i was thinking for a fast and safe contex switcher, scheduler, thread scheduler.
As you may know Q1-kernel has a very new kind of core and thread control. The kernel runs on one core plus 2 threads (or 1 based on threads count) and the rest of cores and threads are separated in Nodes, more like a cluster with very fast communication. In this way every core has his own job and that means no core conflict.... read more
Ok so i just completed some things from the roadmap
Special thanks to Robert Claus for helping me with the OS and porting musl to it
I want to start with special thanks:
to MJ_jakk for helping me with the network driver
to Gabriel Nix for helping me with porting lasm to ARM, and giving me tips for assembly
to Harry-Youth for helping me with management the kernel
They are some skilled programmers that helped in redox, linux and ARM development
For the next big update here is the roadmap:
1. Networking (even if only ethernet) complete
2. Process management to have a new arhitecture planning
3. Moreeeeee syscalls and more support for software
4. An OS... read more
| Kernel | Syscall Latency (μs) | Context Switch (ns) | IPC Round-trip (ns) | Minor Page Fault (ns/page) |
|---|---|---|---|---|
| Q1-kernel | 0.2 – 0.3 | 230 – 250 | 800 – 900 | 2000 – 2500 |
| Linux | 0.2 – 0.4 | 150 – 250 | 700 – 1200 | 1000 – 3000 |
| DragonFly BSD | 0.3 – 0.5 | 200 – 300 | 800 – 1300 | 1500 – 3500 |
| XNU (macOS) | 0.6 – 0.9 | 400 – 600 | 1200 – 2000 | 2000 – 4000 |
| Windows NT | 1.0 – 1.5 | 500 – 700 | 1500 – 2500 | 2500 – 4500 |
With lasm 0.2 comes some big improvements with Q1-kernel. With lasm 0.2 we have xt and con instructions. Those 2 instructions can be used in register manipulation like instead of 4 lines with "block" instruction plus "main" manipulation you can easily do that xt. At the same time with con you can access cpu cores in separate registers without advance "block" instruction.
Enough with lasm lets start with Q1-kernel improvements in multi coring. As you may know Q1-kernel threats every separate core like a separate pc. So everything runs in a "cluster" with high speed messaging, The OS runs in on core then it gives instruction to each core about userspace processing. In this way there are no core conflicts. In this test every OS runs on the Qemu 10.1.1 version. We have linux vs DragonFly BSD vs Q1-kernel. The test is how fast can each one compile Q1-kernel... read more