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    Apr 21st, 2025 (edited)
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    ASM (NASM) 2.27 KB | Source Code | 0 0
    1. ;
    2. ; pwm_v1.asm
    3. ;
    4. ; Created: 21/04/2025 13:31:25
    5. ; Author : Bemposta
    6. ;
    7. .EQU Clock = 16000000 ;processor’s clock frequency, Hz
    8. .EQU Baud = 9600 ;desired serial port baud rate (bits per second)
    9. .EQU UBRRvalue = Clock/(Baud*16) -1 ;calculates value to be put in UBRR0H:L
    10. .DSEG
    11. valorPWM: .byte 1
    12. .CSEG
    13. .ORG 0x00000 ;reset interrupt vector
    14. jmp Start
    15. .ORG URXCaddr ; 0x00024 -> interrupt vectors for USART0
    16. jmp USART0_reception_completed
    17. .ORG INT_VECTORS_SIZE ;leave room for IRQ vectors
    18. Start:
    19. ldi r16, 0xFF
    20. out ddrd, r16
    21. ldi r18, (2<<COM0A0) | (1<<WGM00)
    22. out TCCR0A, r18
    23. ldi r18, (0<<WGM02) | (3<<CS00)
    24. out TCCR0B, r18
    25. ldi r20, 0 ;registro resevado para la PWM. No se debe hacer asi!!!!!!
    26. sts valorPWM, r20
    27. out ocr0a, r20
    28. ;configure USART0
    29. RCALL init_USART0
    30. SEI ;enable interrupts globally
    31. Loop:
    32. ;nothing to do here, just be alive
    33. NOP
    34. rjmp Loop
    35. init_USART0:
    36. PUSH R16
    37. LDI R16, LOW(UBRRvalue)
    38. STS UBRR0L, R16 ;load the low byte
    39. LDI R16, HIGH(UBRRvalue)
    40. STS UBRR0H, R16 ;load the low byte
    41. ; enable receive and transmit, enable USART0 interrupts (UDR empty, Tx finished, Rx finished)
    42. LDI R16, (1<<RXEN0)|(0<<TXEN0)|(0<<UDRIE0)|(0<< TXCIE0)|(1<< RXCIE0)
    43. STS UCSR0B, R16 ;set control register UCSR0B with the corresponding bits
    44. ; configure USART 0 as asynchronous, set frame format: 8 data bits, 1 stop bit, no parity
    45. LDI R16, (0<<UMSEL00) |(1<<UCSZ01)|(1<< UCSZ00) |(0<< USBS0)|(0<<UPM01)|(0<< UPM00)
    46. STS UCSR0C, R16 ;set control register UCSR0C with the corresponding bits
    47. POP R16
    48. RET
    49. USART0_reception_completed:
    50. PUSH R16 ;this handler routine will be automatically called every 61msec (in this example)
    51. IN R16, SREG ;Backup SREG. MANDATORY in interrupt handler routines
    52. PUSH R16
    53. push r20
    54. ;do the desired periodic task here
    55. LDS R16, UDR0 ;pick up the byte received and do anything with it
    56. cpi r16, 'a'
    57. brne sigue
    58. lds r20, valorPWM
    59. inc r20
    60. out ocr0a, r20
    61. sts valorPWM, r20
    62. sigue:
    63. cpi r16, 's'
    64. brne termina
    65. lds r20, valorPWM
    66. dec r20
    67. out ocr0a, r20
    68. sts valorPWM, r20
    69. out ocr0a, r20
    70. termina:
    71. pop r20
    72. POP R16
    73. OUT SREG, R16 ;Recover SREG from the previous backup
    74. POP R16
    75. RETI ;RETI is MANDATORY when returning from an interrupt handling routine
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