[Python-checkins] python/dist/src/Python ceval.c, 2.414, 2.415 sysmodule.c, 2.125, 2.126

Thu Aug 12 20:19:20 CEST 2004

Update of /cvsroot/python/python/dist/src/Python
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv3386/Python
Modified Files:
	ceval.c sysmodule.c 
Log Message:
This is my patch:
[ 1005891 ] support --with-tsc on PPC
plus a trivial change to settscdump's docstring and a Misc/NEWS entry.
Index: ceval.c
===================================================================
RCS file: /cvsroot/python/python/dist/src/Python/ceval.c,v
retrieving revision 2.414
retrieving revision 2.415
diff -C2 -d -r2.414 -r2.415
*** ceval.c	7 Aug 2004 20:58:32 -0000	2.414
--- ceval.c	12 Aug 2004 18:19:07 -0000	2.415
***************
*** 18,25 ****
 
 #ifdef WITH_TSC
- #include <asm/msr.h>
 
 typedef unsigned long long uint64;
 
 void dump_tsc(int opcode, int ticked, uint64 inst0, uint64 inst1, 
 	 uint64 loop0, uint64 loop1, uint64 intr0, uint64 intr1)
--- 18,53 ----
 
 #ifdef WITH_TSC
 
 typedef unsigned long long uint64;
 
+ #if defined(__ppc__) /* <- Don't know if this is the correct symbol; this
+ 			 section should work for GCC on any PowerPC platform,
+ 			 irrespective of OS. POWER? Who knows :-) */
+ 
+ #define rdtscll(var) ppc_getcounter(&var)
+ 
+ static void
+ ppc_getcounter(uint64 *v)
+ {
+ 	register unsigned long tbu, tb, tbu2;
+ 
+ loop:
+ 	asm volatile ("mftbu %0" : "=r" (tbu) );
+ 	asm volatile ("mftb %0" : "=r" (tb) );
+ 	asm volatile ("mftbu %0" : "=r" (tbu2));
+ 	if (__builtin_expect(tbu != tbu2, 0)) goto loop;
+ 
+ 	/* The slightly peculiar way of writing the next lines is 
+ 	 compiled better by GCC than any other way I tried. */
+ 	((long*)(v))[0] = tbu;
+ 	((long*)(v))[1] = tb;
+ }
+ 
+ #else /* this section is for linux/x86 */
+ 
+ #include <asm/msr.h>
+ 
+ #endif
+ 
 void dump_tsc(int opcode, int ticked, uint64 inst0, uint64 inst1, 
 	 uint64 loop0, uint64 loop1, uint64 intr0, uint64 intr1)
***************
*** 35,38 ****
--- 63,67 ----
 		opcode, ticked, inst, loop);
 }
+ 
 #endif
 
***************
*** 546,549 ****
--- 575,581 ----
 	rdtscll(loop0);
 	rdtscll(loop1);
+ 
+ 	/* shut up the compiler */
+ 	opcode = 0;
 #endif
 
Index: sysmodule.c
===================================================================
RCS file: /cvsroot/python/python/dist/src/Python/sysmodule.c,v
retrieving revision 2.125
retrieving revision 2.126
diff -C2 -d -r2.125 -r2.126
*** sysmodule.c	13 Jun 2004 20:32:17 -0000	2.125
--- sysmodule.c	12 Aug 2004 18:19:17 -0000	2.126
***************
*** 466,470 ****
 If true, tell the Python interpreter to dump VM measurements to\n\
 stderr. If false, turn off dump. The measurements are based on the\n\
! Pentium time-stamp counter."
 ); 
 #endif /* TSC */
--- 466,470 ----
 If true, tell the Python interpreter to dump VM measurements to\n\
 stderr. If false, turn off dump. The measurements are based on the\n\
! processor's time-stamp counter."
 ); 
 #endif /* TSC */