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RFC: two-level page tables for 16KB pages on LP64 kernels



Normally, MIPS uses a 3 level page table for a 64-bit kernel which gives 1TB 
(40 [12+10+9+9] bits) of user address space when using 4KB pages. A 3 level 
page table using 16KB pages can address 256TB (48 [14+12+11+11] bits) while a 2 
level page table using 16KB pages can address 128GB (37 [14+12+11] bits) of 
address space.
Thinking about it, 128GB seems to more than enough on the GDIUM or other 
Loongson2 base platforms but it is significantly less the 16TB that it could 
use. I have to think the smaller (but adequate) address space using a simple 2 
level page table might result in a small performance boost.
I figure this could be a config file option. Maybe even defining 
VM_MAX_USER_ADDRESS in an option file and letting the kernel figure out how 
many levels are needed to accomodate that maximum.
 


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