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Commit ca9eecd

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Auto merge of #144208 - matthiaskrgr:rollup-wrli87h, r=matthiaskrgr
Rollup of 11 pull requests Successful merges: - #141260 (Allow volatile access to non-Rust memory, including address 0) - #143604 (Stabilize `const_float_round_methods`) - #143988 ([rustdoc] Make aliases search support partial matching) - #144078 (Fix debuginfo-lto-alloc.rs test) - #144111 (Remove deprecated `MaybeUninit` slice methods) - #144116 (Fixes for LLVM 21) - #144134 (Cleanup unicode table gen) - #144142 (Add implicit sized bound to trait ascription types) - #144148 (Remove pretty print hack for async blocks) - #144169 (interpret: fix TypeId pointers being considered data pointers) - #144196 (Initialize mingw for the runner's user) r? `@ghost` `@rustbot` modify labels: rollup
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‎.github/workflows/ci.yml

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -182,11 +182,6 @@ jobs:
182182
- name: install MinGW
183183
run: src/ci/scripts/install-mingw.sh
184184

185-
# Workaround for spurious ci failures after mingw install
186-
# see https://rust-lang.zulipchat.com/#narrow/channel/242791-t-infra/topic/Spurious.20bors.20CI.20failures/near/528915775
187-
- name: ensure home dir exists
188-
run: mkdir -p ~
189-
190185
- name: install ninja
191186
run: src/ci/scripts/install-ninja.sh
192187

‎compiler/rustc_codegen_llvm/src/back/owned_target_machine.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ impl OwnedTargetMachine {
3939
debug_info_compression: &CStr,
4040
use_emulated_tls: bool,
4141
args_cstr_buff: &[u8],
42+
use_wasm_eh: bool,
4243
) -> Result<Self, LlvmError<'static>> {
4344
assert!(args_cstr_buff.len() > 0);
4445
assert!(
@@ -72,6 +73,7 @@ impl OwnedTargetMachine {
7273
use_emulated_tls,
7374
args_cstr_buff.as_ptr() as *const c_char,
7475
args_cstr_buff.len(),
76+
use_wasm_eh,
7577
)
7678
};
7779

‎compiler/rustc_codegen_llvm/src/back/write.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ use rustc_codegen_ssa::back::write::{
1515
BitcodeSection, CodegenContext, EmitObj, ModuleConfig, TargetMachineFactoryConfig,
1616
TargetMachineFactoryFn,
1717
};
18+
use rustc_codegen_ssa::base::wants_wasm_eh;
1819
use rustc_codegen_ssa::traits::*;
1920
use rustc_codegen_ssa::{CompiledModule, ModuleCodegen, ModuleKind};
2021
use rustc_data_structures::profiling::SelfProfilerRef;
@@ -285,6 +286,8 @@ pub(crate) fn target_machine_factory(
285286
let file_name_display_preference =
286287
sess.filename_display_preference(RemapPathScopeComponents::DEBUGINFO);
287288

289+
let use_wasm_eh = wants_wasm_eh(sess);
290+
288291
Arc::new(move |config: TargetMachineFactoryConfig| {
289292
let path_to_cstring_helper = |path: Option<PathBuf>| -> CString {
290293
let path = path.unwrap_or_default();
@@ -321,6 +324,7 @@ pub(crate) fn target_machine_factory(
321324
&debuginfo_compression,
322325
use_emulated_tls,
323326
&args_cstr_buff,
327+
use_wasm_eh,
324328
)
325329
})
326330
}

‎compiler/rustc_codegen_llvm/src/context.rs

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -207,6 +207,11 @@ pub(crate) unsafe fn create_module<'ll>(
207207
// LLVM 21 updated the default layout on nvptx: https://github.com/llvm/llvm-project/pull/124961
208208
target_data_layout = target_data_layout.replace("e-p6:32:32-i64", "e-i64");
209209
}
210+
if sess.target.arch == "amdgpu" {
211+
// LLVM 21 adds the address width for address space 8.
212+
// See https://github.com/llvm/llvm-project/pull/139419
213+
target_data_layout = target_data_layout.replace("p8:128:128:128:48", "p8:128:128")
214+
}
210215
}
211216

212217
// Ensure the data-layout values hardcoded remain the defaults.

‎compiler/rustc_codegen_llvm/src/llvm/ffi.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2425,6 +2425,7 @@ unsafe extern "C" {
24252425
UseEmulatedTls: bool,
24262426
ArgsCstrBuff: *const c_char,
24272427
ArgsCstrBuffLen: usize,
2428+
UseWasmEH: bool,
24282429
) -> *mut TargetMachine;
24292430

24302431
pub(crate) fn LLVMRustDisposeTargetMachine(T: *mut TargetMachine);

‎compiler/rustc_const_eval/src/interpret/memory.rs

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,8 @@ pub enum AllocKind {
6767
LiveData,
6868
/// A function allocation (that fn ptrs point to).
6969
Function,
70-
/// A (symbolic) vtable allocation.
71-
VTable,
70+
/// A "virtual" allocation, used for vtables and TypeId.
71+
Virtual,
7272
/// A dead allocation.
7373
Dead,
7474
}
@@ -950,11 +950,9 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
950950
let (size, align) = global_alloc.size_and_align(*self.tcx, self.typing_env);
951951
let mutbl = global_alloc.mutability(*self.tcx, self.typing_env);
952952
let kind = match global_alloc {
953-
GlobalAlloc::TypeId { .. }
954-
| GlobalAlloc::Static { .. }
955-
| GlobalAlloc::Memory { .. } => AllocKind::LiveData,
953+
GlobalAlloc::Static { .. } | GlobalAlloc::Memory { .. } => AllocKind::LiveData,
956954
GlobalAlloc::Function { .. } => bug!("We already checked function pointers above"),
957-
GlobalAlloc::VTable { .. } => AllocKind::VTable,
955+
GlobalAlloc::VTable { .. } | GlobalAlloc::TypeId{ .. }=> AllocKind::Virtual,
958956
};
959957
return AllocInfo::new(size, align, kind, mutbl);
960958
}

‎compiler/rustc_hir_analysis/src/hir_ty_lowering/mod.rs

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2495,6 +2495,14 @@ impl<'tcx> dyn HirTyLowerer<'tcx> + '_ {
24952495
ty::List::empty(),
24962496
PredicateFilter::All,
24972497
);
2498+
self.add_sizedness_bounds(
2499+
&mut bounds,
2500+
self_ty,
2501+
hir_bounds,
2502+
None,
2503+
None,
2504+
hir_ty.span,
2505+
);
24982506
self.register_trait_ascription_bounds(bounds, hir_ty.hir_id, hir_ty.span);
24992507
self_ty
25002508
}

‎compiler/rustc_lint/src/ptr_nulls.rs

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -160,12 +160,10 @@ impl<'tcx> LateLintPass<'tcx> for PtrNullChecks {
160160
let (arg_indices, are_zsts_allowed): (&[_], _) = match diag_name {
161161
sym::ptr_read
162162
| sym::ptr_read_unaligned
163-
| sym::ptr_read_volatile
164163
| sym::ptr_replace
165164
| sym::ptr_write
166165
| sym::ptr_write_bytes
167-
| sym::ptr_write_unaligned
168-
| sym::ptr_write_volatile => (&[0], true),
166+
| sym::ptr_write_unaligned => (&[0], true),
169167
sym::slice_from_raw_parts | sym::slice_from_raw_parts_mut => (&[0], false),
170168
sym::ptr_copy
171169
| sym::ptr_copy_nonoverlapping

‎compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -396,7 +396,7 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
396396
bool EmitStackSizeSection, bool RelaxELFRelocations, bool UseInitArray,
397397
const char *SplitDwarfFile, const char *OutputObjFile,
398398
const char *DebugInfoCompression, bool UseEmulatedTls,
399-
const char *ArgsCstrBuff, size_t ArgsCstrBuffLen) {
399+
const char *ArgsCstrBuff, size_t ArgsCstrBuffLen, bool UseWasmEH) {
400400

401401
auto OptLevel = fromRust(RustOptLevel);
402402
auto RM = fromRust(RustReloc);
@@ -462,6 +462,9 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
462462
Options.ThreadModel = ThreadModel::Single;
463463
}
464464

465+
if (UseWasmEH)
466+
Options.ExceptionModel = ExceptionHandling::Wasm;
467+
465468
Options.EmitStackSizeSection = EmitStackSizeSection;
466469

467470
if (ArgsCstrBuff != nullptr) {

‎compiler/rustc_middle/src/ty/print/pretty.rs

Lines changed: 1 addition & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1210,30 +1210,6 @@ pub trait PrettyPrinter<'tcx>: Printer<'tcx> + fmt::Write {
12101210
}
12111211

12121212
for (assoc_item_def_id, term) in assoc_items {
1213-
// Skip printing `<{coroutine@} as Coroutine<_>>::Return` from async blocks,
1214-
// unless we can find out what coroutine return type it comes from.
1215-
let term = if let Some(ty) = term.skip_binder().as_type()
1216-
&& let ty::Alias(ty::Projection, proj) = ty.kind()
1217-
&& let Some(assoc) = tcx.opt_associated_item(proj.def_id)
1218-
&& assoc
1219-
.trait_container(tcx)
1220-
.is_some_and(|def_id| tcx.is_lang_item(def_id, LangItem::Coroutine))
1221-
&& assoc.opt_name() == Some(rustc_span::sym::Return)
1222-
{
1223-
if let ty::Coroutine(_, args) = args.type_at(0).kind() {
1224-
let return_ty = args.as_coroutine().return_ty();
1225-
if !return_ty.is_ty_var() {
1226-
return_ty.into()
1227-
} else {
1228-
continue;
1229-
}
1230-
} else {
1231-
continue;
1232-
}
1233-
} else {
1234-
term.skip_binder()
1235-
};
1236-
12371213
if first {
12381214
p!("<");
12391215
first = false;
@@ -1243,7 +1219,7 @@ pub trait PrettyPrinter<'tcx>: Printer<'tcx> + fmt::Write {
12431219

12441220
p!(write("{} = ", tcx.associated_item(assoc_item_def_id).name()));
12451221

1246-
match term.kind() {
1222+
match term.skip_binder().kind() {
12471223
TermKind::Ty(ty) => p!(print(ty)),
12481224
TermKind::Const(c) => p!(print(c)),
12491225
};

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