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Commit 7aa99d5

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Misc fixes/streamlining
1 parent fec4f9b commit 7aa99d5

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90 files changed

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‎10_virtual_mem_part1_identity_mapping/README.md‎

Lines changed: 43 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -331,7 +331,7 @@ Minipush 1.0
331331
[ 0.811829] MMU online. Special regions:
332332
[ 0.812306] 0x00080000 - 0x0008ffff | 64 KiB | C RO PX | Kernel code and RO data
333333
[ 0.813324] 0x1fff0000 - 0x1fffffff | 64 KiB | Dev RW PXN | Remapped Device MMIO
334-
[ 0.814310] 0x3f000000 - 0x4000ffff | 16 MiB | Dev RW PXN | Device MMIO
334+
[ 0.814310] 0x3f000000 - 0x4000ffff | 17 MiB | Dev RW PXN | Device MMIO
335335
[ 0.815198] Current privilege level: EL1
336336
[ 0.815675] Exception handling state:
337337
[ 0.816119] Debug: Masked
@@ -1079,28 +1079,61 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr
10791079
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
10801080
mod raspberrypi;
10811081

1082+
diff -uNr 09_privilege_level/src/common.rs 10_virtual_mem_part1_identity_mapping/src/common.rs
1083+
--- 09_privilege_level/src/common.rs
1084+
+++ 10_virtual_mem_part1_identity_mapping/src/common.rs
1085+
@@ -0,0 +1,22 @@
1086+
+// SPDX-License-Identifier: MIT OR Apache-2.0
1087+
+//
1088+
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
1089+
+
1090+
+//! General purpose code.
1091+
+
1092+
+/// Convert a size into human readable format.
1093+
+pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
1094+
+ const KIB: usize = 1024;
1095+
+ const MIB: usize = 1024 * 1024;
1096+
+ const GIB: usize = 1024 * 1024 * 1024;
1097+
+
1098+
+ if (size / GIB) > 0 {
1099+
+ (size.div_ceil(GIB), "GiB")
1100+
+ } else if (size / MIB) > 0 {
1101+
+ (size.div_ceil(MIB), "MiB")
1102+
+ } else if (size / KIB) > 0 {
1103+
+ (size.div_ceil(KIB), "KiB")
1104+
+ } else {
1105+
+ (size, "Byte")
1106+
+ }
1107+
+}
1108+
10821109
diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs
10831110
--- 09_privilege_level/src/main.rs
10841111
+++ 10_virtual_mem_part1_identity_mapping/src/main.rs
1085-
@@ -107,7 +107,9 @@
1112+
@@ -107,18 +107,23 @@
10861113
//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`.
10871114

10881115
#![allow(clippy::upper_case_acronyms)]
10891116
+#![allow(incomplete_features)]
10901117
#![feature(asm_const)]
10911118
+#![feature(core_intrinsics)]
10921119
#![feature(format_args_nl)]
1120+
+#![feature(int_roundings)]
10931121
#![feature(panic_info_message)]
10941122
#![feature(trait_alias)]
1095-
@@ -119,6 +121,7 @@
1123+
#![no_main]
1124+
#![no_std]
1125+
1126+
mod bsp;
1127+
+mod common;
1128+
mod console;
10961129
mod cpu;
10971130
mod driver;
10981131
mod exception;
10991132
+mod memory;
11001133
mod panic_wait;
11011134
mod print;
11021135
mod synchronization;
1103-
@@ -129,9 +132,17 @@
1136+
@@ -129,9 +134,17 @@
11041137
/// # Safety
11051138
///
11061139
/// - Only a single core must be active and running this function.
@@ -1119,7 +1152,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
11191152

11201153
for i in bsp::driver::driver_manager().all_device_drivers().iter() {
11211154
if let Err(x) = i.init() {
1122-
@@ -147,7 +158,7 @@
1155+
@@ -147,7 +160,7 @@
11231156

11241157
/// The main function running after the early init.
11251158
fn kernel_main() -> ! {
@@ -1128,7 +1161,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
11281161
use core::time::Duration;
11291162
use driver::interface::DriverManager;
11301163
use time::interface::TimeManager;
1131-
@@ -159,6 +170,9 @@
1164+
@@ -159,6 +172,9 @@
11321165
);
11331166
info!("Booting on: {}", bsp::board_name());
11341167

@@ -1138,7 +1171,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s
11381171
let (_, privilege_level) = exception::current_privilege_level();
11391172
info!("Current privilege level: {}", privilege_level);
11401173

1141-
@@ -182,6 +196,13 @@
1174+
@@ -182,6 +198,13 @@
11421175
info!("Timer test, spinning for 1 second");
11431176
time::time_manager().spin_for(Duration::from_secs(1));
11441177

@@ -1175,7 +1208,7 @@ diff -uNr 09_privilege_level/src/memory/mmu/translation_table.rs 10_virtual_mem_
11751208
diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
11761209
--- 09_privilege_level/src/memory/mmu.rs
11771210
+++ 10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs
1178-
@@ -0,0 +1,264 @@
1211+
@@ -0,0 +1,253 @@
11791212
+// SPDX-License-Identifier: MIT OR Apache-2.0
11801213
+//
11811214
+// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
@@ -1198,6 +1231,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
11981231
+
11991232
+mod translation_table;
12001233
+
1234+
+use crate::common;
12011235
+use core::{fmt, ops::RangeInclusive};
12021236
+
12031237
+//--------------------------------------------------------------------------------------------------
@@ -1357,19 +1391,7 @@ diff -uNr 09_privilege_level/src/memory/mmu.rs 10_virtual_mem_part1_identity_map
13571391
+ let end = *(self.virtual_range)().end();
13581392
+ let size = end - start + 1;
13591393
+
1360-
+ // log2(1024).
1361-
+ const KIB_RSHIFT: u32 = 10;
1362-
+
1363-
+ // log2(1024 * 1024).
1364-
+ const MIB_RSHIFT: u32 = 20;
1365-
+
1366-
+ let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
1367-
+ (size >> MIB_RSHIFT, "MiB")
1368-
+ } else if (size >> KIB_RSHIFT) > 0 {
1369-
+ (size >> KIB_RSHIFT, "KiB")
1370-
+ } else {
1371-
+ (size, "Byte")
1372-
+ };
1394+
+ let (size, unit) = common::size_human_readable_ceil(size);
13731395
+
13741396
+ let attr = match self.attribute_fields.mem_attributes {
13751397
+ MemAttributes::CacheableDRAM => "C",
Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
// SPDX-License-Identifier: MIT OR Apache-2.0
2+
//
3+
// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
4+
5+
//! General purpose code.
6+
7+
/// Convert a size into human readable format.
8+
pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
9+
const KIB: usize = 1024;
10+
const MIB: usize = 1024 * 1024;
11+
const GIB: usize = 1024 * 1024 * 1024;
12+
13+
if (size / GIB) > 0 {
14+
(size.div_ceil(GIB), "GiB")
15+
} else if (size / MIB) > 0 {
16+
(size.div_ceil(MIB), "MiB")
17+
} else if (size / KIB) > 0 {
18+
(size.div_ceil(KIB), "KiB")
19+
} else {
20+
(size, "Byte")
21+
}
22+
}

‎10_virtual_mem_part1_identity_mapping/src/main.rs‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,12 +111,14 @@
111111
#![feature(asm_const)]
112112
#![feature(core_intrinsics)]
113113
#![feature(format_args_nl)]
114+
#![feature(int_roundings)]
114115
#![feature(panic_info_message)]
115116
#![feature(trait_alias)]
116117
#![no_main]
117118
#![no_std]
118119

119120
mod bsp;
121+
mod common;
120122
mod console;
121123
mod cpu;
122124
mod driver;

‎10_virtual_mem_part1_identity_mapping/src/memory/mmu.rs‎

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ mod arch_mmu;
2020

2121
mod translation_table;
2222

23+
use crate::common;
2324
use core::{fmt, ops::RangeInclusive};
2425

2526
//--------------------------------------------------------------------------------------------------
@@ -179,19 +180,7 @@ impl fmt::Display for TranslationDescriptor {
179180
let end = *(self.virtual_range)().end();
180181
let size = end - start + 1;
181182

182-
// log2(1024).
183-
const KIB_RSHIFT: u32 = 10;
184-
185-
// log2(1024 * 1024).
186-
const MIB_RSHIFT: u32 = 20;
187-
188-
let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
189-
(size >> MIB_RSHIFT, "MiB")
190-
} else if (size >> KIB_RSHIFT) > 0 {
191-
(size >> KIB_RSHIFT, "KiB")
192-
} else {
193-
(size, "Byte")
194-
};
183+
let (size, unit) = common::size_human_readable_ceil(size);
195184

196185
let attr = match self.attribute_fields.mem_attributes {
197186
MemAttributes::CacheableDRAM => "C",

‎11_exceptions_part1_groundwork/README.md‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -421,7 +421,7 @@ Minipush 1.0
421421
[ 0.798530] Booting on: Raspberry Pi 3
422422
[ 0.798985] MMU online. Special regions:
423423
[ 0.799462] 0x00080000 - 0x0008ffff | 64 KiB | C RO PX | Kernel code and RO data
424-
[ 0.800480] 0x3f000000 - 0x4000ffff | 16 MiB | Dev RW PXN | Device MMIO
424+
[ 0.800480] 0x3f000000 - 0x4000ffff | 17 MiB | Dev RW PXN | Device MMIO
425425
[ 0.801369] Current privilege level: EL1
426426
[ 0.801845] Exception handling state:
427427
[ 0.802290] Debug: Masked
@@ -1024,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p
10241024
diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs
10251025
--- 10_virtual_mem_part1_identity_mapping/src/main.rs
10261026
+++ 11_exceptions_part1_groundwork/src/main.rs
1027-
@@ -140,6 +140,8 @@
1027+
@@ -142,6 +142,8 @@
10281028
use driver::interface::DriverManager;
10291029
use memory::mmu::interface::MMU;
10301030

@@ -1033,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
10331033
if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() {
10341034
panic!("MMU: {}", string);
10351035
}
1036-
@@ -158,7 +160,7 @@
1036+
@@ -160,7 +162,7 @@
10371037

10381038
/// The main function running after the early init.
10391039
fn kernel_main() -> ! {
@@ -1042,7 +1042,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_
10421042
use core::time::Duration;
10431043
use driver::interface::DriverManager;
10441044
use time::interface::TimeManager;
1045-
@@ -196,13 +198,28 @@
1045+
@@ -198,13 +200,28 @@
10461046
info!("Timer test, spinning for 1 second");
10471047
time::time_manager().spin_for(Duration::from_secs(1));
10481048

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
// SPDX-License-Identifier: MIT OR Apache-2.0
2+
//
3+
// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
4+
5+
//! General purpose code.
6+
7+
/// Convert a size into human readable format.
8+
pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
9+
const KIB: usize = 1024;
10+
const MIB: usize = 1024 * 1024;
11+
const GIB: usize = 1024 * 1024 * 1024;
12+
13+
if (size / GIB) > 0 {
14+
(size.div_ceil(GIB), "GiB")
15+
} else if (size / MIB) > 0 {
16+
(size.div_ceil(MIB), "MiB")
17+
} else if (size / KIB) > 0 {
18+
(size.div_ceil(KIB), "KiB")
19+
} else {
20+
(size, "Byte")
21+
}
22+
}

‎11_exceptions_part1_groundwork/src/main.rs‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,12 +111,14 @@
111111
#![feature(asm_const)]
112112
#![feature(core_intrinsics)]
113113
#![feature(format_args_nl)]
114+
#![feature(int_roundings)]
114115
#![feature(panic_info_message)]
115116
#![feature(trait_alias)]
116117
#![no_main]
117118
#![no_std]
118119

119120
mod bsp;
121+
mod common;
120122
mod console;
121123
mod cpu;
122124
mod driver;

‎11_exceptions_part1_groundwork/src/memory/mmu.rs‎

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ mod arch_mmu;
2020

2121
mod translation_table;
2222

23+
use crate::common;
2324
use core::{fmt, ops::RangeInclusive};
2425

2526
//--------------------------------------------------------------------------------------------------
@@ -179,19 +180,7 @@ impl fmt::Display for TranslationDescriptor {
179180
let end = *(self.virtual_range)().end();
180181
let size = end - start + 1;
181182

182-
// log2(1024).
183-
const KIB_RSHIFT: u32 = 10;
184-
185-
// log2(1024 * 1024).
186-
const MIB_RSHIFT: u32 = 20;
187-
188-
let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
189-
(size >> MIB_RSHIFT, "MiB")
190-
} else if (size >> KIB_RSHIFT) > 0 {
191-
(size >> KIB_RSHIFT, "KiB")
192-
} else {
193-
(size, "Byte")
194-
};
183+
let (size, unit) = common::size_human_readable_ceil(size);
195184

196185
let attr = match self.attribute_fields.mem_attributes {
197186
MemAttributes::CacheableDRAM => "C",
Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
// SPDX-License-Identifier: MIT OR Apache-2.0
2+
//
3+
// Copyright (c) 2020-2022 Andre Richter <andre.o.richter@gmail.com>
4+
5+
//! General purpose code.
6+
7+
/// Convert a size into human readable format.
8+
pub const fn size_human_readable_ceil(size: usize) -> (usize, &'static str) {
9+
const KIB: usize = 1024;
10+
const MIB: usize = 1024 * 1024;
11+
const GIB: usize = 1024 * 1024 * 1024;
12+
13+
if (size / GIB) > 0 {
14+
(size.div_ceil(GIB), "GiB")
15+
} else if (size / MIB) > 0 {
16+
(size.div_ceil(MIB), "MiB")
17+
} else if (size / KIB) > 0 {
18+
(size.div_ceil(KIB), "KiB")
19+
} else {
20+
(size, "Byte")
21+
}
22+
}

‎12_integrated_testing/kernel/src/lib.rs‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,7 @@
113113
#![feature(asm_const)]
114114
#![feature(core_intrinsics)]
115115
#![feature(format_args_nl)]
116+
#![feature(int_roundings)]
116117
#![feature(linkage)]
117118
#![feature(panic_info_message)]
118119
#![feature(trait_alias)]
@@ -127,6 +128,7 @@ mod panic_wait;
127128
mod synchronization;
128129

129130
pub mod bsp;
131+
pub mod common;
130132
pub mod console;
131133
pub mod cpu;
132134
pub mod driver;

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