Commit 924fe98

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cmd/internal/obj/riscv: add encoding for compressed riscv64 instructions

Regenerate instruction encodings for riscv64, including rv64_c, rv_c and rv_c_d. Updates #71105 Change-Id: I004cc00290bf018ebb848592d84d924481f03851 Reviewed-on: https://go-review.googlesource.com/c/go/+/523476 Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com> Reviewed-by: Cherry Mui <cherryyz@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>

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src/cmd/internal/obj/riscv

3 files changed

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`‎src/cmd/internal/obj/riscv/anames.go‎`

Lines changed: 41 additions & 0 deletions

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`‎src/cmd/internal/obj/riscv/cpu.go‎`

Lines changed: 62 additions & 3 deletions

Original file line number	Diff line number	Diff line change
`@@ -551,7 +551,7 @@ const (`
`551`	`551`	`AFNMADDQ`
`552`	`552`	`AFNMSUBQ`
`553`	`553`
`554`		`- // 22.3 Quad-Precision Convert and Move Instructions`
	`554`	`+ // 22.3: Quad-Precision Convert and Move Instructions`
`555`	`555`	`AFCVTWQ`
`556`	`556`	`AFCVTLQ`
`557`	`557`	`AFCVTSQ`
`@@ -568,14 +568,73 @@ const (`
`568`	`568`	`AFSGNJNQ`
`569`	`569`	`AFSGNJXQ`
`570`	`570`
`571`		`- // 22.4 Quad-Precision Floating-Point Compare Instructions`
	`571`	`+ // 22.4: Quad-Precision Floating-Point Compare Instructions`
`572`	`572`	`AFEQQ`
`573`	`573`	`AFLEQ`
`574`	`574`	`AFLTQ`
`575`	`575`
`576`		`- // 22.5 Quad-Precision Floating-Point Classify Instruction`
	`576`	`+ // 22.5: Quad-Precision Floating-Point Classify Instruction`
`577`	`577`	`AFCLASSQ`
`578`	`578`
	`579`	`+ //`
	`580`	`+ // "C" Extension for Compressed Instructions`
	`581`	`+ //`
	`582`	`+`
	`583`	`+ // 26.3.1: Compressed Stack-Pointer-Based Loads and Stores`
	`584`	`+ ACLWSP`
	`585`	`+ ACFLWSP`
	`586`	`+ ACLDSP`
	`587`	`+ ACFLDSP`
	`588`	`+ ACSWSP`
	`589`	`+ ACSDSP`
	`590`	`+ ACFSWSP`
	`591`	`+ ACFSDSP`
	`592`	`+`
	`593`	`+ // 26.3.2: Compressed Register-Based Loads and Stores`
	`594`	`+ ACLW`
	`595`	`+ ACLD`
	`596`	`+ ACFLW`
	`597`	`+ ACFLD`
	`598`	`+ ACSW`
	`599`	`+ ACSD`
	`600`	`+ ACFSW`
	`601`	`+ ACFSD`
	`602`	`+`
	`603`	`+ // 26.4: Compressed Control Transfer Instructions`
	`604`	`+ ACJ`
	`605`	`+ ACJR`
	`606`	`+ ACJALR`
	`607`	`+ ACBEQZ`
	`608`	`+ ACBNEZ`
	`609`	`+`
	`610`	`+ // 26.5.1: Compressed Integer Constant-Generation Instructions`
	`611`	`+ ACLI`
	`612`	`+ ACLUI`
	`613`	`+ ACADDI`
	`614`	`+ ACADDIW`
	`615`	`+ ACADDI16SP`
	`616`	`+ ACADDI4SPN`
	`617`	`+ ACSLLI`
	`618`	`+ ACSRLI`
	`619`	`+ ACSRAI`
	`620`	`+ ACANDI`
	`621`	`+`
	`622`	`+ // 26.5.3: Compressed Integer Register-Register Operations`
	`623`	`+ ACMV`
	`624`	`+ ACADD`
	`625`	`+ ACAND`
	`626`	`+ ACOR`
	`627`	`+ ACXOR`
	`628`	`+ ACSUB`
	`629`	`+ ACADDW`
	`630`	`+ ACSUBW`
	`631`	`+`
	`632`	`+ // 26.5.5: Compressed NOP Instruction`
	`633`	`+ ACNOP`
	`634`	`+`
	`635`	`+ // 26.5.6: Compressed Breakpoint Instruction`
	`636`	`+ ACEBREAK`
	`637`	`+`
`579`	`638`	`//`
`580`	`639`	`// "B" Extension for Bit Manipulation, Version 1.0.0`
`581`	`640`	`//`

`‎src/cmd/internal/obj/riscv/inst.go‎`

Lines changed: 75 additions & 1 deletion

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Commit 924fe98

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3 files changed

3 files changed

`‎src/cmd/internal/obj/riscv/anames.go‎`

`‎src/cmd/internal/obj/riscv/cpu.go‎`

`‎src/cmd/internal/obj/riscv/inst.go‎`

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