Commit ac05f18

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ci(pre-commit): Apply automatic fixes

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Lines changed: 2 additions & 1 deletion

Original file line number	Diff line number	Diff line change
`@@ -19,7 +19,8 @@`
`19`	`19`	`#include "esp_attr.h"`
`20`	`20`	`#include "esp_log.h"`
`21`	`21`	`#include "soc/rtc.h"`
`22`		`-#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) && !defined(CONFIG_IDF_TARGET_ESP32C5)`
	`22`	`+#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) \`
	`23`	`+ && !defined(CONFIG_IDF_TARGET_ESP32C5)`
`23`	`24`	`#include "soc/rtc_cntl_reg.h"`
`24`	`25`	`#include "soc/syscon_reg.h"`
`25`	`26`	`#endif`

Lines changed: 2 additions & 1 deletion

Original file line number	Diff line number	Diff line change
`@@ -84,7 +84,8 @@ bool SPIClass::begin(int8_t sck, int8_t miso, int8_t mosi, int8_t ss) {`
`84`	`84`	`_miso = (_spi_num == FSPI) ? MISO : -1;`
`85`	`85`	`_mosi = (_spi_num == FSPI) ? MOSI : -1;`
`86`	`86`	`_ss = (_spi_num == FSPI) ? SS : -1;`
`87`		`-#elif CONFIG_IDF_TARGET_ESP32C2 \|\| CONFIG_IDF_TARGET_ESP32C3 \|\| CONFIG_IDF_TARGET_ESP32C6 \|\| CONFIG_IDF_TARGET_ESP32H2 \|\| CONFIG_IDF_TARGET_ESP32P4 \|\| CONFIG_IDF_TARGET_ESP32C5`
	`87`	`+#elif CONFIG_IDF_TARGET_ESP32C2 \|\| CONFIG_IDF_TARGET_ESP32C3 \|\| CONFIG_IDF_TARGET_ESP32C6 \|\| CONFIG_IDF_TARGET_ESP32H2 \|\| CONFIG_IDF_TARGET_ESP32P4 \`
	`88`	`+ \|\| CONFIG_IDF_TARGET_ESP32C5`
`88`	`89`	`_sck = SCK;`
`89`	`90`	`_miso = MISO;`
`90`	`91`	`_mosi = MOSI;`

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